JPS5940563A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5940563A
JPS5940563A JP57150960A JP15096082A JPS5940563A JP S5940563 A JPS5940563 A JP S5940563A JP 57150960 A JP57150960 A JP 57150960A JP 15096082 A JP15096082 A JP 15096082A JP S5940563 A JPS5940563 A JP S5940563A
Authority
JP
Japan
Prior art keywords
film
substrate
well
forming
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57150960A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0481339B2 (enrdf_load_stackoverflow
Inventor
Sunao Shibata
直 柴田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57150960A priority Critical patent/JPS5940563A/ja
Publication of JPS5940563A publication Critical patent/JPS5940563A/ja
Publication of JPH0481339B2 publication Critical patent/JPH0481339B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention

Landscapes

  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP57150960A 1982-08-31 1982-08-31 半導体装置の製造方法 Granted JPS5940563A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57150960A JPS5940563A (ja) 1982-08-31 1982-08-31 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57150960A JPS5940563A (ja) 1982-08-31 1982-08-31 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5940563A true JPS5940563A (ja) 1984-03-06
JPH0481339B2 JPH0481339B2 (enrdf_load_stackoverflow) 1992-12-22

Family

ID=15508191

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57150960A Granted JPS5940563A (ja) 1982-08-31 1982-08-31 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5940563A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61500140A (ja) * 1983-10-11 1986-01-23 アメリカン テレフオン アンド テレグラフ カムパニ− 相補型金属−酸化物−半導体デバイスを含む半導体回路
JPS6252957A (ja) * 1985-09-02 1987-03-07 Toshiba Corp Ｃｍｏｓ半導体装置
US4656730A (en) * 1984-11-23 1987-04-14 American Telephone And Telegraph Company, At&T Bell Laboratories Method for fabricating CMOS devices

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55148466A (en) * 1979-05-10 1980-11-19 Nec Corp Cmos semiconductor device and its manufacture
JPS55154770A (en) * 1979-05-23 1980-12-02 Toshiba Corp Manufacture of complementary mos semiconductor device
JPS55154748A (en) * 1979-05-23 1980-12-02 Toshiba Corp Complementary mos semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55148466A (en) * 1979-05-10 1980-11-19 Nec Corp Cmos semiconductor device and its manufacture
JPS55154770A (en) * 1979-05-23 1980-12-02 Toshiba Corp Manufacture of complementary mos semiconductor device
JPS55154748A (en) * 1979-05-23 1980-12-02 Toshiba Corp Complementary mos semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61500140A (ja) * 1983-10-11 1986-01-23 アメリカン テレフオン アンド テレグラフ カムパニ− 相補型金属−酸化物−半導体デバイスを含む半導体回路
US4656730A (en) * 1984-11-23 1987-04-14 American Telephone And Telegraph Company, At&T Bell Laboratories Method for fabricating CMOS devices
JPS6252957A (ja) * 1985-09-02 1987-03-07 Toshiba Corp Ｃｍｏｓ半導体装置

Also Published As

Publication number Publication date
JPH0481339B2 (enrdf_load_stackoverflow) 1992-12-22

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