JPS5940394A - Mos記憶装置 - Google Patents
Mos記憶装置Info
- Publication number
- JPS5940394A JPS5940394A JP57149329A JP14932982A JPS5940394A JP S5940394 A JPS5940394 A JP S5940394A JP 57149329 A JP57149329 A JP 57149329A JP 14932982 A JP14932982 A JP 14932982A JP S5940394 A JPS5940394 A JP S5940394A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- refresh
- circuit
- storage device
- address signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57149329A JPS5940394A (ja) | 1982-08-30 | 1982-08-30 | Mos記憶装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57149329A JPS5940394A (ja) | 1982-08-30 | 1982-08-30 | Mos記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5940394A true JPS5940394A (ja) | 1984-03-06 |
JPH0350358B2 JPH0350358B2 (enrdf_load_stackoverflow) | 1991-08-01 |
Family
ID=15472726
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57149329A Granted JPS5940394A (ja) | 1982-08-30 | 1982-08-30 | Mos記憶装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5940394A (enrdf_load_stackoverflow) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4680737A (en) * | 1984-05-07 | 1987-07-14 | Hitachi, Ltd. | Semiconductor integrated circuit device |
JPS6320798A (ja) * | 1986-07-14 | 1988-01-28 | Pfu Ltd | リフレツシユ自動切替制御方式 |
US4736344A (en) * | 1985-03-25 | 1988-04-05 | Hitachi, Ltd. | Semiconductor memory |
JP2006155841A (ja) * | 2004-12-01 | 2006-06-15 | Nec Electronics Corp | 半導体記憶装置及びリフレッシュ制御方法 |
-
1982
- 1982-08-30 JP JP57149329A patent/JPS5940394A/ja active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4680737A (en) * | 1984-05-07 | 1987-07-14 | Hitachi, Ltd. | Semiconductor integrated circuit device |
US4736344A (en) * | 1985-03-25 | 1988-04-05 | Hitachi, Ltd. | Semiconductor memory |
JPS6320798A (ja) * | 1986-07-14 | 1988-01-28 | Pfu Ltd | リフレツシユ自動切替制御方式 |
JP2006155841A (ja) * | 2004-12-01 | 2006-06-15 | Nec Electronics Corp | 半導体記憶装置及びリフレッシュ制御方法 |
Also Published As
Publication number | Publication date |
---|---|
JPH0350358B2 (enrdf_load_stackoverflow) | 1991-08-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0069764B1 (en) | Random access memory system having high-speed serial data paths | |
US7319629B2 (en) | Method of operating a dynamic random access memory cell | |
US5555523A (en) | Semiconductor memory device | |
US5719814A (en) | Semiconductor memory device capable of storing high potential level of data | |
US6337821B1 (en) | Dynamic random access memory having continuous data line equalization except at address translation during data reading | |
JP4544808B2 (ja) | 半導体記憶装置の制御方法、および半導体記憶装置 | |
US6789137B2 (en) | Semiconductor memory device allowing reduction of I/O terminals | |
US6704238B2 (en) | Semiconductor memory device including data bus pairs respectively dedicated to data writing and data reading | |
KR0139787B1 (ko) | 검지 및 리프레시가 개선된 다이내믹 랜덤 액세스 메모리 | |
US5007028A (en) | Multiport memory with improved timing of word line selection | |
US6288952B1 (en) | System for improved memory cell access | |
EP0062547A2 (en) | Memory circuit | |
JP2980368B2 (ja) | ダイナミック型半導体記憶装置 | |
EP0321847B1 (en) | Semiconductor memory capable of improving data rewrite speed | |
US5481496A (en) | Semiconductor memory device and method of data transfer therefor | |
US7036056B2 (en) | Semiconductor memory device having time reduced in testing of memory cell data reading or writing, or testing of sense amplifier performance | |
KR960000891B1 (ko) | 데이타 읽어내기 완료 타이밍을 빠르게한 다이내믹 ram | |
JPS5940394A (ja) | Mos記憶装置 | |
JPS6083293A (ja) | ダイナミツク型ram | |
US6115308A (en) | Sense amplifier and method of using the same with pipelined read, restore and write operations | |
JPH11328966A (ja) | 半導体記憶装置及びデータ処理装置 | |
JPS60211692A (ja) | 半導体記憶装置 | |
JP3067060B2 (ja) | 半導体記憶装置 | |
JP2662821B2 (ja) | 半導体記憶装置 | |
JPH01199393A (ja) | 半導体記憶装置 |