JPS594019A - パタ−ン比較検査方法 - Google Patents

パタ−ン比較検査方法

Info

Publication number
JPS594019A
JPS594019A JP57112779A JP11277982A JPS594019A JP S594019 A JPS594019 A JP S594019A JP 57112779 A JP57112779 A JP 57112779A JP 11277982 A JP11277982 A JP 11277982A JP S594019 A JPS594019 A JP S594019A
Authority
JP
Japan
Prior art keywords
pattern
wafer
patterns
reference pattern
inspection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57112779A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0258777B2 (enrdf_load_stackoverflow
Inventor
Eiji Nishikata
西形 英治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57112779A priority Critical patent/JPS594019A/ja
Publication of JPS594019A publication Critical patent/JPS594019A/ja
Publication of JPH0258777B2 publication Critical patent/JPH0258777B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
JP57112779A 1982-06-30 1982-06-30 パタ−ン比較検査方法 Granted JPS594019A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57112779A JPS594019A (ja) 1982-06-30 1982-06-30 パタ−ン比較検査方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57112779A JPS594019A (ja) 1982-06-30 1982-06-30 パタ−ン比較検査方法

Publications (2)

Publication Number Publication Date
JPS594019A true JPS594019A (ja) 1984-01-10
JPH0258777B2 JPH0258777B2 (enrdf_load_stackoverflow) 1990-12-10

Family

ID=14595279

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57112779A Granted JPS594019A (ja) 1982-06-30 1982-06-30 パタ−ン比較検査方法

Country Status (1)

Country Link
JP (1) JPS594019A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08339074A (ja) * 1995-03-22 1996-12-24 Hyundai Electron Ind Co Ltd 露光マスクの製造方法
US6767680B2 (en) 2001-08-30 2004-07-27 Advanced Micro Devices, Inc. Semiconductor structure and method for determining critical dimensions and overlay error
US7099010B2 (en) 2002-05-31 2006-08-29 Advanced Micro Devices, Inc. Two-dimensional structure for determining an overlay accuracy by means of scatterometry
US7307712B2 (en) 2002-10-28 2007-12-11 Asml Netherlands B.V. Method of detecting mask defects, a computer program and reference substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08339074A (ja) * 1995-03-22 1996-12-24 Hyundai Electron Ind Co Ltd 露光マスクの製造方法
US6767680B2 (en) 2001-08-30 2004-07-27 Advanced Micro Devices, Inc. Semiconductor structure and method for determining critical dimensions and overlay error
US7099010B2 (en) 2002-05-31 2006-08-29 Advanced Micro Devices, Inc. Two-dimensional structure for determining an overlay accuracy by means of scatterometry
US7307712B2 (en) 2002-10-28 2007-12-11 Asml Netherlands B.V. Method of detecting mask defects, a computer program and reference substrate

Also Published As

Publication number Publication date
JPH0258777B2 (enrdf_load_stackoverflow) 1990-12-10

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