JPS5938850A - 割算回路 - Google Patents

割算回路

Info

Publication number
JPS5938850A
JPS5938850A JP57148813A JP14881382A JPS5938850A JP S5938850 A JPS5938850 A JP S5938850A JP 57148813 A JP57148813 A JP 57148813A JP 14881382 A JP14881382 A JP 14881382A JP S5938850 A JPS5938850 A JP S5938850A
Authority
JP
Japan
Prior art keywords
addition
bit
address
integer
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57148813A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6259339B2 (enExample
Inventor
Shigenori Tokumitsu
徳光　重則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57148813A priority Critical patent/JPS5938850A/ja
Priority to US06/525,490 priority patent/US4599702A/en
Priority to DE3330688A priority patent/DE3330688A1/de
Priority to GB08322867A priority patent/GB2126386B/en
Priority to KR1019830004001A priority patent/KR860001321B1/ko
Publication of JPS5938850A publication Critical patent/JPS5938850A/ja
Publication of JPS6259339B2 publication Critical patent/JPS6259339B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5354—Using table lookup, e.g. for digit selection in division by digit recurrence

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Image Processing (AREA)
  • Television Systems (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Complex Calculations (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Logic Circuits (AREA)
JP57148813A 1982-08-27 1982-08-27 割算回路 Granted JPS5938850A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP57148813A JPS5938850A (ja) 1982-08-27 1982-08-27 割算回路
US06/525,490 US4599702A (en) 1982-08-27 1983-08-22 Divider circuit for dividing n-bit binary data using decimal shifting and summation techniques
DE3330688A DE3330688A1 (de) 1982-08-27 1983-08-25 Dividierschaltung
GB08322867A GB2126386B (en) 1982-08-27 1983-08-25 Divider circuit
KR1019830004001A KR860001321B1 (ko) 1982-08-27 1983-08-26 제산회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57148813A JPS5938850A (ja) 1982-08-27 1982-08-27 割算回路

Publications (2)

Publication Number Publication Date
JPS5938850A true JPS5938850A (ja) 1984-03-02
JPS6259339B2 JPS6259339B2 (enExample) 1987-12-10

Family

ID=15461282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57148813A Granted JPS5938850A (ja) 1982-08-27 1982-08-27 割算回路

Country Status (5)

Country Link
US (1) US4599702A (enExample)
JP (1) JPS5938850A (enExample)
KR (1) KR860001321B1 (enExample)
DE (1) DE3330688A1 (enExample)
GB (1) GB2126386B (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2585649B2 (ja) * 1987-11-30 1997-02-26 インデータシステムズ株式会社 除算回路
JP3276444B2 (ja) * 1993-03-22 2002-04-22 三菱電機株式会社 除算回路
GB2383557B (en) 2001-06-15 2003-08-27 Hills Numberplates Ltd Medium to bear indicia

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5611548A (en) * 1979-07-11 1981-02-04 Nec Corp Division unit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3631230A (en) * 1970-09-24 1971-12-28 Ibm Binary arithmetic unit implementing a multiplicative steration for the exponential, logarithm, quotient and square root functions
US4118785A (en) * 1973-10-08 1978-10-03 Nippon Telegraph And Telephone Public Corporation Method and apparatus for digital attenuation by pattern shifting

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5611548A (en) * 1979-07-11 1981-02-04 Nec Corp Division unit

Also Published As

Publication number Publication date
GB2126386A (en) 1984-03-21
KR860001321B1 (ko) 1986-09-13
US4599702A (en) 1986-07-08
GB8322867D0 (en) 1983-09-28
KR840006090A (ko) 1984-11-21
DE3330688C2 (enExample) 1988-12-29
DE3330688A1 (de) 1984-03-01
GB2126386B (en) 1985-12-24
JPS6259339B2 (enExample) 1987-12-10

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