JPS593374U

JPS593374U - Frequency abnormality detection circuit

Info

Publication number: JPS593374U
Application number: JP9971182U
Authority: JP
Inventors: 啓二仲津; 上西　明
Original assignee: 三菱電機株式会社
Priority date: 1982-06-29
Filing date: 1982-06-29
Publication date: 1984-01-10

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来の周波数異常検出回路の回路図、第２図ａ
、　　ｂ、　　ｃは第１図の回路図の各部における種々
の状態での信号波形を示す波形図、第３図ａはこの考案
の一実施例による周波数異常検出回路の構成を示すブロ
ック図、第３図すはその具体的な回路図、第４図は第３
図すの各部における信号の波形図、第５図ａ、　　ｂ、
　　ｃは第３図すの各部における種々の状態での信号波
形を示す波形図である。１・・・コンパレータ、１５，２０，２１，２２゜３０
・・・フリップフロップ、２５，２６．２７・・・カウ
ンタ、３８・・・スイッチ。なお１、図中同一符号は同
−又は相当部分を示す。、　　　　δ６Ｙｌｓｑ　　Ｌ゛−− ３ｆＯ−Ｈ δｎ　　Ｌ“ 第　２　図（！）゛８６　７１　　　　　　　　　　　ｖ２１ｖｌＳθ Ｓｔｉ　　　”／−’ ｅ６．；ｅｑ　　ビＨ°　　　　　　　　　　　　　　　　　　
：・６：　　　　　　　！ｅｑ’　　　　　　、、　　　　’Ｈ−ｎ−ｒ。ｅｔｏ　　　　“プＣｆｔ　　　　　　　　　　　　　　　゛ｅ６キーーー
〜−−−−−−↓− ｅｑ　１．　’　−、、１ｅｇ　　、　　　　　　　　　　、　　：ｅｑ　　’　
　　　　　　　　、　　　　’　　　Ｃ７θ Ｃ〃Ｔｏ　　　　　’ｗＴｚ−Figure 1 is a circuit diagram of a conventional frequency abnormality detection circuit, Figure 2a
, b, c are waveform diagrams showing signal waveforms in various states in each part of the circuit diagram of FIG. 1, FIG. Figure 3 is the specific circuit diagram, Figure 4 is the 3rd diagram.
Waveform diagrams of signals at each part in Figure 5, Figure 5 a, b,
3c is a waveform diagram showing signal waveforms in various states in each part of FIG. 3. 1... Comparator, 15, 20, 21, 22°30
...Flip-flop, 25, 26.27...Counter, 38...Switch. 1. The same reference numerals in the figures indicate the same or corresponding parts. , δ6Yl sq L゛-- 3fO-H δn L" Figure 2 (!) ゛86 71 v21vl Sθ Sti"/-'e6.; eq biH°
：・６： ! eq',,'H-n-r. eto "P Cft ゛e6 key～-------↓- eq 1. ' -,,1 eg, , :eq'
, 'C7θ C〃To 'wTz−

Claims

[Scope of utility model registration request]

A rectangular wave circuit that converts an AC waveform input signal into a rectangular wave signal of the same frequency, a zero point detection circuit that detects the zero point of the output signal of this rectangular wave circuit, and a frequency N times the frequency of the input signal (
a crystal oscillator that generates a pulse train of a frequency (N is a positive integer of 2 or more); a counter circuit that counts the output pulses of this oscillator and is reset by the output of the zero point detection circuit;
The multiple divided outputs of this counter circuit are input, and the period corresponding to the upper limit of the frequency tolerance range 9 of the input signal is counted.
a first AND circuit that generates an output pulse when
a second AND circuit that receives the plurality of frequency-divided outputs of the counter circuit as input and generates an output pulse when counting a cycle corresponding to the lower limit of the frequency tolerance range of the input signal; a first memory circuit that is set by the output and reset by the output of the zero point detection circuit; a first memory circuit that is set by the output of the second AND circuit;
A frequency abnormality detection circuit comprising: an output of the storage circuit; and a second storage circuit that stores its own output at the time of output from the zero point detection circuit.