JPS6040149U - Phase comparator for bit-synchronized PLL - Google Patents
Phase comparator for bit-synchronized PLLInfo
- Publication number
- JPS6040149U JPS6040149U JP13064583U JP13064583U JPS6040149U JP S6040149 U JPS6040149 U JP S6040149U JP 13064583 U JP13064583 U JP 13064583U JP 13064583 U JP13064583 U JP 13064583U JP S6040149 U JPS6040149 U JP S6040149U
- Authority
- JP
- Japan
- Prior art keywords
- phase difference
- signal
- reference phase
- difference signal
- detection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、本考案のビット同期ＰＬＬ用位相比較器の全
体ブロック図である。第２図は、第１および３図の主要
部位の信号の時間的関係を示すタイミングチャートであ
る。第３図は、本考案によるビット同期ＰＬＬ用位相比
較器の一実施例を示す回路図である。 、
１・・・・・・データエツジ検出回路、２・・・・・・
位相差検出回路、３・・・・・・基準位相差信号発生回
路、４・・・・・・制御信号発生回路。
４′ｒ２
ｒ
■ＶＣＯφり
訓ヨ、−−戸畔！げ峰−Ｊに
ｌ −ｍ：−Ｊｏ １
ｍ−」FIG. 1 is an overall block diagram of a phase comparator for a bit-synchronized PLL according to the present invention. FIG. 2 is a timing chart showing the temporal relationship of the signals of the main parts in FIGS. 1 and 3. FIG. FIG. 3 is a circuit diagram showing an embodiment of a phase comparator for bit-synchronized PLL according to the present invention. , 1... Data edge detection circuit, 2...
Phase difference detection circuit, 3... Reference phase difference signal generation circuit, 4... Control signal generation circuit. 4'r2 r ■VCOφ Rikuyo, --Tobe! Gemine-J ni l-m:-Jo 1 m-”
Claims (1)
スを発生するデータエツジ検出回路と、前記エツジパル
スと電圧制御発振器からのビットクロック信号とを入力
とし、データエツジからデータエツジの直後の次に生起
するピットクロック信号のレベルの同一方向転換点まで
の期間に一致する位相差信号を発生する位相差検出回路
と、前記位相差検出回路の出力と前記ピットクロック信
号とを入力とし、前記位相差信号と後縁が一致しピット
クロック信号の周期のほぼ１／２（７）巾ｔ１４する基
準位相差信号を発生する基準位相差信号発生回路と、前
記位相差検出回路からの位相差信号と前記基準位相差発
生回路からの基準位相差信号とを合成することにより、
データエツジから前記基準位相差信号までの幅に一致す
るパルスと前記基準位相差信号のパルスとが前後に相隣
接しかつ反対極性になる信号を発生し、これを低域濾波
器を介して前記電圧制御発振器の制御信号として送出す
る制御信号発生回路とを備えたビット同期ＰＬＬ用位相
比較器。A data edge detection circuit generates edge pulses indicating the rising and falling edges of an input data signal, and the edge pulses and a bit clock signal from a voltage controlled oscillator are input, and the level of the next pit clock signal generated immediately after the data edge is determined from the data edge. a phase difference detection circuit that generates a phase difference signal that coincides with the period up to the same direction change point; and an output of the phase difference detection circuit and the pit clock signal as inputs, a reference phase difference signal generation circuit that generates a reference phase difference signal having a width t14 of approximately 1/2 (7) of the period of the pit clock signal, and a phase difference signal from the phase difference detection circuit and the reference phase difference generation circuit. By combining with the reference phase difference signal,
A pulse matching the width from the data edge to the reference phase difference signal and a pulse of the reference phase difference signal generate a signal that is adjacent to each other and has opposite polarity, and this is passed through a low-pass filter to the voltage of the reference phase difference signal. A phase comparator for a bit-synchronized PLL, comprising a control signal generation circuit that sends out a control signal for a controlled oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13064583U JPS6040149U (en) | 1983-08-24 | 1983-08-24 | Phase comparator for bit-synchronized PLL |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13064583U JPS6040149U (en) | 1983-08-24 | 1983-08-24 | Phase comparator for bit-synchronized PLL |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6040149U true JPS6040149U (en) | 1985-03-20 |
Family
ID=30295626
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13064583U Pending JPS6040149U (en) | 1983-08-24 | 1983-08-24 | Phase comparator for bit-synchronized PLL |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6040149U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01123544A (en) * | 1987-10-19 | 1989-05-16 | Internatl Business Mach Corp <Ibm> | Clock signal extracting circuit |
-
1983
- 1983-08-24 JP JP13064583U patent/JPS6040149U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01123544A (en) * | 1987-10-19 | 1989-05-16 | Internatl Business Mach Corp <Ibm> | Clock signal extracting circuit |
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