SU471601A1 - Device for reproducing a phase-shift signal from a magnetic carrier - Google Patents

Description

The invention relates to automation and computer technology and is intended for use in digital storage devices on magnetic media. The known devices for reproducing a phase-shift keyed signal, containing a reproduction head, connected through an amplifier-limiter to the inputs of a demodulator connected by its output to a signal bus, units and a frequency doubler connected to a counting trigger input, the output of which is connected to the clock bus through a differentiating and the detecting cell are relatively complex and do not have an increased reliability of operation due to the low noise immunity with respect to the joint action of parasitic A M channel of magnetic recording and flukguatsionny noise of electronics units. In the proposed device, the demodulator is made in the form of two time delay circuits connected to its input directly and through an inverter and an OR circuit connected by its inputs to the outputs of the delayed time circuit, and the output to the output of the demodulator and through an additional differentiating and detecting cell - with a logical trigger input. The drawing shows the functional scheme of the proposed device. The circuit contains a playback head 1, an amplifier-limiter 2 connected to the bus 3 unit signals, a demodulator 4 consisting of an inverter 5, time delay circuits 6 and 7, and an OR 8 circuit, a clock 9, which includes frequency doubler 10, trigger 11, differentiating and detecting cells 12 and 13 and the bus 14 clock pulses. The device works as follows. The phase-manipulated signal reproduced by the magnetic head 1 is fed to the limiting amplifier 2, from the output of which the signal is fed to the input of the demodulator 4 and to the driver 9 of synchronizing pulses. One of the circuits 6 or 7 of the time delay of the amplifier-limiter 2 is fed directly, and the other is inverted by the cell of the "inverter 5 NOT-inverted" phase-shifted signal. The delay times 6 and 7 provide the output signal (signals of units on bus 3 when the phase is manipulated, i.e. when the duration of the input pulse exceeds the delay time (g delay - –Go) determined by the timing elements of circuit 6 or 7.

Thus, in the absence of phase manipulation, when the duration of the pulses arriving at the input of circuits 6 or 7 is the exposure. -T,

four

time

There will be no signal at the output of the demodulator 4.

During the phase manipulation, when Timp, the output of the demodulator through the summing circuit “P1LI 8” receives unit signals.

The phase-manipulated signal from the amplifier-limiter 2 to the input of the demodulator simultaneously enters the frequency doubler 10, which generates pulses from the positive and negative edges of the limited amplitude signal, which are then fed to the counting input of the trigger 11.

The pulse sequence of the frequency doubler is incomplete. The missing pulses are filled with unit signals from the output of the demodulator through the additional differentiating and detecting cells 12 to the logical input of the trigger 11.

From the output of the trigger through the differentiating and detecting cell 13, the synchronization pulses are fed to the output of the clock pulse generator 9 (bus 14).

Thus, this device, along with the simplification of the scheme, increases the tolerance for changing the duration of the characteristic

Interval Phase-Manipulated Signal

TO

to Dt -, which corresponds to the noise immunity limit for signals limited in amplitude. Due to this, the value of the fluctuations of the velocity of the magnetic carrier increases accordingly. -;.: - .;

Subject and title

A device for reproducing a phase-shift keyed signal from a magnetic carrier containing a reproduction head connected through an amplifier-limiter to the inputs of a demodulator connected by its output to a signal strip, units and a frequency doubler connected to the counting trigger input whose output is connected to the clock pulse through differentiating and detecting cell, about t and which, in order to increase the reliability of operation and simplify the device, the demodulator is made in the form of two shutter speeds in The circuits connected to its input directly and through the inverter and the OR circuit connected by its inputs to the outputs of the time delay circuits, and the output to the output of the demodulator and, through an additional differentiating and detecting cell, to the trigger logic input.