JPS593371A - Testing method of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce considerably the testing time for one lot, by executing all tests only with q pieces among the total P pieces in one lot, and omitting a number of tests with for the remaining (p-q) pieces. CONSTITUTION:In the stage of testing P pieces of objects to be tested on one lot, a test program is stored in a storage part 5 for the test program, and the (q) pieces of the test objects to be tested in all tests among P pieces of the objects are stored in a storage part 8. The reference yields serving as criteria for whether the tests can be omitted or not according to the results of the tests with (q) pieces are stored in storage parts 71-7N for the respective tests, then storage parts 61-6N for the results of the tests are initialized. A measurement part 2 is started by a CPU1 to test the objects 3 to be tested and the results are stored in the parts 61-6N. When the quantities tested exceed (q), the CPU1 compares the result of a test and the reference yield before each test, omits the test if the result is higher than reference yield and advances to the next test. The processing capacity of the costly tester is thus considerably improved.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method and apparatus for testing semiconductor integrated circuits and the like.

Recently, semiconductor integrated circuits have become larger in scale, and test equipment has become more sophisticated, complex, and expensive.
Furthermore, as the number of test items and test time have increased significantly, test costs have been increasing rapidly.

Generally, test equipment is used to test and inspect semiconductor integrated circuits, etc., and test programs that define test conditions, test items, test order, and flow are prepared according to each product type.1. Normally, all test objects such as circuits are tested and inspected. At that time, a test program is input into the test equipment, and the test equipment tests the test object based on the test program and determines whether it is good or bad. conduct.

However, as mentioned above, testing equipment has become more expensive, the number of test items for test samples has increased2, and testing time has increased, so the throughput of testing equipment has decreased, leading to an increase in testing costs. I'm teasing you. .

The present invention provides a test method and a test device that solve these problems.

Conventionally, testing of semiconductor integrated circuits, etc. has been performed on all items from the 1st test to the Nth test for non-defective products, as shown in the flowchart in Figure 11. However, the manufacturing technology for semiconductor integrated circuits has progressed significantly. In addition, the manufacturing process for semiconductor integrated circuits, etc. is basically a batch process, and semiconductor integrated circuits, etc. in the same lot may exhibit similar characteristics. Yoshi, 1st
For some tests from test to Nth test,
Often all test results are positive.

The present invention focuses on this point and aims to reduce test costs.

For tests where all test results are good, it is possible to omit the test, and for tests where all test results are expected to be good, it is possible to omit the test for the reasons stated above. be judged.

The present invention will be explained below.

An embodiment of the present invention is shown in FIG. 1 is the central processing unit (
The CPU (hereinafter abbreviated as "CPU") controls the test equipment. 2 is a measuring section, 3 is a test object, and 4 is a storage section, which includes a storage section 5 for test programs, and a test program storage section 5 for storing test programs from the first test to the Nth test. Storage section for each test result 61+ 62+ 63+・
. . , 6N, reference yield storage units 71, 7□, 73 . ...
, 7N1 includes a number storage unit 8 of test objects to be tested for all tests. The operation is explained as follows. 10
Before testing p test objects, a test program for the test objects as shown in FIG. The number q of test objects is stored in the storage unit 8, and the standard yield, which is the criterion for determining whether or not to omit the test, is stored in the storage unit 7□+ for each test according to the q test results.
72+ 78+ . . . 17N, and the test result storage units 61+ 62+ 63+ . . . 16N are initialized. When the test is started, the CPU 1 sequentially reads the contents of the test program storage section 5, starts the measurement section 2 according to the contents, tests the test object 3, and stores the test results of each test in the storage section 61+62+. 63+...Stored in 16N. The CPU reads the contents of the storage section 8, q, and compares the number of tests with the size of q. If the number of tests does not exceed q, it tests all the tests based on the contents of the test program, and calculates the results of each test. Test result summary The yield of each test is stored in J+ 62+ 63+...16N
Repeatedly storing.

Next, when the number of test pieces exceeds q, the CPUI reads out the test result and the standard yield sheet before each test, compares the size, and if the test result is the standard yield of 9 or more, the test is omitted, and υ This test is determined to be good and we proceed to the next test. For example, before the first test, the contents of the test result storage unit 61, the yield ratio of the first test for pq pieces, and the first
Read the standard yield of the test and the contents of the storage unit 71, compare the sizes, and if the test result is the standard yield of 9 or more,
Skip the first test and proceed to the second test. Furthermore, if the test result is lower than the standard yield, that test is repeated up to the Nth test.

Here, the standard yield storage section 711732, 7f+...1
Although any value can be set for 7N, if the condition is that all test results are good, a numerical value corresponding to a yield υ100% may be stored.

As explained above, according to the present invention, all tests are performed on only q out of the total number p of 10 bits, and fi series (p-
q) Since some tests are omitted, the test time of 10 tests can be significantly shortened, and the throughput of expensive test equipment can be greatly improved.

[Brief explanation of drawings]

FIG. 1 is a flow chart of a test program, and FIG. 2 is a four-step diagram showing an embodiment of the present invention. In the figure, 1... central processing unit, 2...
... Measuring section, 3 ... Test object, 4 ...
... Storage section, 5... Test program storage section,
61+61+ 681...16N...Test result storage section, 71+ 72+ 73+..., 7N...
. . . Standard yield storage unit, 8 . . . Quantity storage unit. Figure 1 Figure 2

Claims (1)

[Claims] In a test method for testing semiconductor integrated circuits, 10
During the test, all test items are tested for the quantity arbitrarily set in advance, and for the remaining quantity, the test results of each test for the quantity tested for all test items are the standards for each test arbitrarily set in advance. A semiconductor device testing method characterized by not testing test items whose yield is higher than the yield.