JPS59205674A - グラフイツクデイスプレイ用マトリツクス乗算回路 - Google Patents
グラフイツクデイスプレイ用マトリツクス乗算回路Info
- Publication number
- JPS59205674A JPS59205674A JP7979783A JP7979783A JPS59205674A JP S59205674 A JPS59205674 A JP S59205674A JP 7979783 A JP7979783 A JP 7979783A JP 7979783 A JP7979783 A JP 7979783A JP S59205674 A JPS59205674 A JP S59205674A
- Authority
- JP
- Japan
- Prior art keywords
- matrix
- data
- elements
- ram2
- area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Data Mining & Analysis (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Algebra (AREA)
- Databases & Information Systems (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7979783A JPS59205674A (ja) | 1983-05-06 | 1983-05-06 | グラフイツクデイスプレイ用マトリツクス乗算回路 |
GB08411337A GB2141847B (en) | 1983-05-06 | 1984-05-03 | Matrix multiplication apparatus for graphic display |
US06/607,420 US4719588A (en) | 1983-05-06 | 1984-05-07 | Matrix multiplication circuit for graphic display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7979783A JPS59205674A (ja) | 1983-05-06 | 1983-05-06 | グラフイツクデイスプレイ用マトリツクス乗算回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59205674A true JPS59205674A (ja) | 1984-11-21 |
JPH036547B2 JPH036547B2 (enrdf_load_stackoverflow) | 1991-01-30 |
Family
ID=13700202
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7979783A Granted JPS59205674A (ja) | 1983-05-06 | 1983-05-06 | グラフイツクデイスプレイ用マトリツクス乗算回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59205674A (enrdf_load_stackoverflow) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51141558A (en) * | 1975-05-31 | 1976-12-06 | Toshiba Corp | High speed processor of multi-dimensional data |
JPS54120546A (en) * | 1978-03-10 | 1979-09-19 | Seiko Instr & Electronics Ltd | Matrix multiplier circuit |
JPS5642870A (en) * | 1979-09-14 | 1981-04-21 | Ricoh Co Ltd | Picture processing system |
-
1983
- 1983-05-06 JP JP7979783A patent/JPS59205674A/ja active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51141558A (en) * | 1975-05-31 | 1976-12-06 | Toshiba Corp | High speed processor of multi-dimensional data |
JPS54120546A (en) * | 1978-03-10 | 1979-09-19 | Seiko Instr & Electronics Ltd | Matrix multiplier circuit |
JPS5642870A (en) * | 1979-09-14 | 1981-04-21 | Ricoh Co Ltd | Picture processing system |
Also Published As
Publication number | Publication date |
---|---|
JPH036547B2 (enrdf_load_stackoverflow) | 1991-01-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4719588A (en) | Matrix multiplication circuit for graphic display | |
US4635292A (en) | Image processor | |
JPH0652530B2 (ja) | ベクトル・プロセッサ | |
US5299144A (en) | Architecture for covariance matrix generation | |
CN212112470U (zh) | 一种矩阵乘法计算电路 | |
EP0474246A2 (en) | Image signal processor | |
KR19990008388A (ko) | 연산기능을 갖는 반도체메모리 및 그것을 사용한 처리장치 | |
JPS59205674A (ja) | グラフイツクデイスプレイ用マトリツクス乗算回路 | |
JP3333779B2 (ja) | 行列演算装置 | |
JP2583774B2 (ja) | 高速数値演算装置 | |
JPH05165875A (ja) | ベクトル演算処理装置 | |
JPS58151644A (ja) | デイジタル演算装置 | |
JP3441847B2 (ja) | データメモリを有するプロセッサ | |
JPS6162174A (ja) | 情報婦理装置 | |
JP3608207B2 (ja) | 並列演算処理装置 | |
JPS6058503B2 (ja) | デ−タ処理制御方式 | |
JPS6211381B2 (enrdf_load_stackoverflow) | ||
JPH0252302B2 (enrdf_load_stackoverflow) | ||
JPH0223476A (ja) | フイルタリング処理装置 | |
KR920008212B1 (ko) | MSCM(Mixed Shuffle Connection Method)을 이용한 이차원 FFT(Fast Fourier Transform)프로세서. | |
JPH01142934A (ja) | 情報処理回路 | |
JP2652973B2 (ja) | 画像処理装置 | |
JPH03139773A (ja) | ディジタル画像処理装置 | |
JPH1153344A (ja) | 行列演算装置及びそれを有する数値演算プロセッサ | |
JPH02176826A (ja) | 表示制御装置の制御方式 |