JPS59201433A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法Info
- Publication number
- JPS59201433A JPS59201433A JP58076537A JP7653783A JPS59201433A JP S59201433 A JPS59201433 A JP S59201433A JP 58076537 A JP58076537 A JP 58076537A JP 7653783 A JP7653783 A JP 7653783A JP S59201433 A JPS59201433 A JP S59201433A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- recession
- bonding agent
- stage
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L24/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L2224/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58076537A JPS59201433A (ja) | 1983-04-30 | 1983-04-30 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58076537A JPS59201433A (ja) | 1983-04-30 | 1983-04-30 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59201433A true JPS59201433A (ja) | 1984-11-15 |
| JPH0226377B2 JPH0226377B2 (cg-RX-API-DMAC7.html) | 1990-06-08 |
Family
ID=13608014
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58076537A Granted JPS59201433A (ja) | 1983-04-30 | 1983-04-30 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59201433A (cg-RX-API-DMAC7.html) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014013848A1 (ja) * | 2012-07-19 | 2014-01-23 | 日産自動車株式会社 | 半導体装置 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0511740U (ja) * | 1991-07-23 | 1993-02-12 | 東洋電機製造株式会社 | 電圧抑制回路 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51121461U (cg-RX-API-DMAC7.html) * | 1975-03-22 | 1976-10-01 | ||
| JPS5684356U (cg-RX-API-DMAC7.html) * | 1979-11-29 | 1981-07-07 | ||
| JPS5844858U (ja) * | 1981-09-21 | 1983-03-25 | 日本電気株式会社 | リ−ドフレ−ム |
-
1983
- 1983-04-30 JP JP58076537A patent/JPS59201433A/ja active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51121461U (cg-RX-API-DMAC7.html) * | 1975-03-22 | 1976-10-01 | ||
| JPS5684356U (cg-RX-API-DMAC7.html) * | 1979-11-29 | 1981-07-07 | ||
| JPS5844858U (ja) * | 1981-09-21 | 1983-03-25 | 日本電気株式会社 | リ−ドフレ−ム |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014013848A1 (ja) * | 2012-07-19 | 2014-01-23 | 日産自動車株式会社 | 半導体装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0226377B2 (cg-RX-API-DMAC7.html) | 1990-06-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6041053B2 (ja) | 半導体装置及びその製造方法 | |
| WO1997031393A1 (en) | Method of making an air tight cavity in an assembly package | |
| TW582078B (en) | Packaging process for improving effective die-bonding area | |
| JPS59201433A (ja) | 半導体装置の製造方法 | |
| JPH1070230A (ja) | Loc用リードフレーム | |
| JPS58182837A (ja) | 樹脂封止半導体装置の製造方法 | |
| JPH0410447A (ja) | Icチップ搭載基板 | |
| JP3022910B2 (ja) | 半導体装置の製造方法 | |
| JPH025534A (ja) | ペースト塗布用ノズル及びペースト塗布方法 | |
| JPS6239681A (ja) | ペ−ストまたはノンドライフイルム接着剤を用いる接合方法 | |
| CN108231987B (zh) | 一种改进的led封装系统及工艺 | |
| JPS629728Y2 (cg-RX-API-DMAC7.html) | ||
| JPS6047430A (ja) | Lsiの樹脂封止方式 | |
| JPS6142859B2 (cg-RX-API-DMAC7.html) | ||
| TW432653B (en) | Flip chip package structure and process with increased encapsulation efficiency and reliability | |
| JPH01272125A (ja) | 半導体装置の製造方法 | |
| JP2006295186A (ja) | 無テープのダイアタッチ方式による集積回路パッケージプロセス | |
| JPS6167970A (ja) | 部品の取り付け構造 | |
| JPH027411A (ja) | 圧電部品の製造方法 | |
| JPS59201432A (ja) | 半導体装置及びその製造方法 | |
| JPS63177430A (ja) | 半導体装置の樹脂封止方法 | |
| JPH0379065A (ja) | 半導体装置用リードフレーム | |
| JPH02238640A (ja) | 半導体装置の製造方法 | |
| JPS5927536A (ja) | 半導体装置及びその製造方法 | |
| JPH09129813A (ja) | リードフレームおよびこれを用いた半導体装置 |