JPS59198739A - チツプキヤリア - Google Patents

チツプキヤリア

Info

Publication number
JPS59198739A
JPS59198739A JP7329983A JP7329983A JPS59198739A JP S59198739 A JPS59198739 A JP S59198739A JP 7329983 A JP7329983 A JP 7329983A JP 7329983 A JP7329983 A JP 7329983A JP S59198739 A JPS59198739 A JP S59198739A
Authority
JP
Japan
Prior art keywords
main body
chip
lsi chip
chipcarrier
lsi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7329983A
Other languages
English (en)
Inventor
Yukio Yamaguchi
幸雄 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7329983A priority Critical patent/JPS59198739A/ja
Publication of JPS59198739A publication Critical patent/JPS59198739A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 発明の属する技術分野 本発明は、電子装置などに使用される配蕨基板にＬＳＩ
チップ金実装するためのチップキャリアに関する。
従来技術 第１図および第２図全参照すると、ＬＳＩチップを実装
する際に使用する従来のテンプキャリアは、ＬＳＩチッ
プ３をキャリア本体１の導体バッド４に半田５で取υ付
けるか、キャリア本体ｌに直接接着して、ＬＳＩチップ
３のリード６全キヤリア本体１の側面および下部周囲に
継がる導体回路２に接続して、保護のため樹脂７によシ
埋め込みｔ設けるか、ふ几によシ封止されている。この
とき、ＬＳＩテップ３の熱はキャリア本体１全介してそ
の上に設けられるヒートシンク、およびヒートパイプ等
の放熱材に伝導される。このような構造において、ＬＳ
Ｉチップから発生する熱量が少ない場合は十分であるが
、キャリア本体ｌの熱抵抗の大きいことが、熱量の多い
ＬＳＩチップを搭載できないという欠点がある。
発明の目的 この発明の目的は上述の従来のＬＳＩチップ実装の欠点
全解決するようにしたチップキャリア全提供することに
ある。
発明の構成 本発明のチップキャリアは本体と、 ＬＳＩチップのリードと電気的に接続される几め前記本
体の側面および下部周囲に継がる導体回路と、 前記ＬＳＩチップの上部への放熱のための放熱体と金含
む。
次に図面全参照して本発明の詳細な説明する。
第３図は本発明の一実施例金示す斜視図である。
第３図全参照すると、キャリア本体１１には、。
上部に放熱体１４が、側面に導体回路１２が、それぞれ
設けられている。
第４図は本発明の一実施例を示す図である。
第４図を参照すると、放熱体１４はキャリア本体１１を
貫通している。導体回路２は、キャリア本体１１の内部
と、下部周囲とに継がっていて、ＬＳＩチップ１３全内
部に搭載するスペース金有している。ＬＳＩチップ１３
は放熱体１４に半日または接着剤等の接合材１５によシ
接続されている。ＬＳＩチップ１３のリード１６は導体
回路２に接続され、半田１８等によシ印刷配組基板１９
上の導体回路２０に電気的接続が行われる。保護のため
、樹脂１７でＬＳＩテップ１３が覆われている。またふ
たによシ封止しても良い。
本発明のチップキャリアは、キャリア本体１１の材質、
たとえばアルミナセラミック（熱伝導率約０．０４　ｃ
ａｌ／−ｗ２−　ｓｅｃ　・℃）に比べて、低い熱抵抗
の導体、たとえば銅タングステン合金（熱伝導率約０．
６　ｃａ　１／ｃｍ２・ｓｅｃ　−’Ｃ）　Ｋｊ％’ｅ
伝、ｔ、その上に設けられるヒートシンク等に伝えられ
るので、発熱量の大きいＬＳＩチップを適する効果があ
る。
本発明にはＬＳＩチップからの発熱全テンプキャリアの
導体部分を介して放散できるので、発熱量の多いＬＳＩ
チップに適して、高密臥実装金可能にするという効果が
ある。
【図面の簡単な説明】
第１図および薬２図は従来のチップキャリアを示す図、
および第３図および第４図は本発明の一実施例を示す図
である。 図において、１．１１・・・・・・キャリア本体、２゜
１２・・・・・・導体回路、３．１３・・・・・・ＬＳ
Ｉチップ、４・・・・・・導体パッド、５・・印・半田
、６・・曲・ＬＳＩチップ３のリード、７．１７・・・
・・・樹脂、１４・・・・・・放熱体、１５・・・・・
・接合材、１６・・・・・・ＬＳＩテップ１３のリード
、１８・・・・・・半田、１９・・・・・・印刷配量基
板、２ｏ・・・・・・印刷配線基板１９の導体回路。

Claims (1)

  1. 【特許請求の範囲】 本体と、 ＬＳＩチップのリードと電気的に接続され不よう前記本
    体の側面および下部周Ｈに継がる導体回路と、 前記ＬＳＩチップの上部への放熱のための放熱体と金含
    むことを特徴とするチップキャリア。
JP7329983A 1983-04-26 1983-04-26 チツプキヤリア Pending JPS59198739A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7329983A JPS59198739A (ja) 1983-04-26 1983-04-26 チツプキヤリア

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7329983A JPS59198739A (ja) 1983-04-26 1983-04-26 チツプキヤリア

Publications (1)

Publication Number Publication Date
JPS59198739A true JPS59198739A (ja) 1984-11-10

Family

ID=13514140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7329983A Pending JPS59198739A (ja) 1983-04-26 1983-04-26 チツプキヤリア

Country Status (1)

Country Link
JP (1) JPS59198739A (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0267926A (ja) * 1988-09-02 1990-03-07 Matsushita Electric Ind Co Ltd 重量検出装置
JPH0267925A (ja) * 1988-09-02 1990-03-07 Matsushita Electric Ind Co Ltd 重量検出装置
JPH0574972A (ja) * 1991-09-13 1993-03-26 Nippon Avionics Co Ltd Ｉｃパツケージ
JPH0525736U (ja) * 1991-09-13 1993-04-02 日本アビオニクス株式会社 放熱パツケージ付きｉｃ
EP0871220A2 (en) * 1997-04-09 1998-10-14 Murata Manufacturing Co., Ltd. Pin usage of a semiconductor package
EP3136430A4 (en) * 2014-04-22 2018-03-07 Kyocera Corporation Wiring board, electronic device, and electronic module

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5559746A (en) * 1978-10-27 1980-05-06 Hitachi Ltd Semiconductor device and its mounting circuit device
JPS5857740A (ja) * 1981-09-30 1983-04-06 Nec Corp チツプキヤリア

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5559746A (en) * 1978-10-27 1980-05-06 Hitachi Ltd Semiconductor device and its mounting circuit device
JPS5857740A (ja) * 1981-09-30 1983-04-06 Nec Corp チツプキヤリア

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0267926A (ja) * 1988-09-02 1990-03-07 Matsushita Electric Ind Co Ltd 重量検出装置
JPH0267925A (ja) * 1988-09-02 1990-03-07 Matsushita Electric Ind Co Ltd 重量検出装置
JPH0574972A (ja) * 1991-09-13 1993-03-26 Nippon Avionics Co Ltd Ｉｃパツケージ
JPH0525736U (ja) * 1991-09-13 1993-04-02 日本アビオニクス株式会社 放熱パツケージ付きｉｃ
EP0871220A2 (en) * 1997-04-09 1998-10-14 Murata Manufacturing Co., Ltd. Pin usage of a semiconductor package
EP0871220A3 (en) * 1997-04-09 1999-04-21 Murata Manufacturing Co., Ltd. Pin usage of a semiconductor package
EP3136430A4 (en) * 2014-04-22 2018-03-07 Kyocera Corporation Wiring board, electronic device, and electronic module

Similar Documents

Publication Publication Date Title
US5710459A (en) Integrated circuit package provided with multiple heat-conducting paths for enhancing heat dissipation and wrapping around cap for improving integrity and reliability
JPH11204679A (ja) 半導体装置
US5525835A (en) Semiconductor chip module having an electrically insulative thermally conductive thermal dissipator directly in contact with the semiconductor element
US20040119158A1 (en) Thermally enhanced package for an integrated circuit
JPS59198739A (ja) チツプキヤリア
JPS6221249A (ja) 半導体装置
JP2590521B2 (ja) チップキャリア
JPH03195053A (ja) インバータ装置
JPS622587A (ja) ハイパワ−用混成集積回路
JP2745786B2 (ja) Ｔａｂ半導体装置
JPH03238852A (ja) モールド型半導体集積回路
JP2564645Y2 (ja) 発熱部品を有する混成集積回路装置
US6265769B1 (en) Double-sided chip mount package
JPS5559746A (en) Semiconductor device and its mounting circuit device
JPS6076149A (ja) チツプキヤリヤ
KR950006441Y1 (ko) 고 발열용 반도체 패키지
JPH0555398A (ja) 半導体装置
JPS6076148A (ja) チツプキヤリヤ
JPH0497554A (ja) 高放熱型半導体パッケージ
JPH05315470A (ja) マルチチップモジュール
JPH043505Y2 (ja)
JPH0426785B2 (ja)
JPH01185957A (ja) 半導体装置
JPH04346250A (ja) 半導体装置
JPH06103724B2 (ja) 半導体チップキャリア