JPS59172849A - 多重化回路 - Google Patents

多重化回路

Info

Publication number
JPS59172849A
JPS59172849A JP4736883A JP4736883A JPS59172849A JP S59172849 A JPS59172849 A JP S59172849A JP 4736883 A JP4736883 A JP 4736883A JP 4736883 A JP4736883 A JP 4736883A JP S59172849 A JPS59172849 A JP S59172849A
Authority
JP
Japan
Prior art keywords
circuit
disturbance
order group
gates
clocks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4736883A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6331979B2 (enrdf_load_stackoverflow
Inventor
Takayuki Okino
沖野　孝之
Haruo Tsuda
津田　春生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4736883A priority Critical patent/JPS59172849A/ja
Publication of JPS59172849A publication Critical patent/JPS59172849A/ja
Publication of JPS6331979B2 publication Critical patent/JPS6331979B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
JP4736883A 1983-03-22 1983-03-22 多重化回路 Granted JPS59172849A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4736883A JPS59172849A (ja) 1983-03-22 1983-03-22 多重化回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4736883A JPS59172849A (ja) 1983-03-22 1983-03-22 多重化回路

Publications (2)

Publication Number Publication Date
JPS59172849A true JPS59172849A (ja) 1984-09-29
JPS6331979B2 JPS6331979B2 (enrdf_load_stackoverflow) 1988-06-28

Family

ID=12773162

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4736883A Granted JPS59172849A (ja) 1983-03-22 1983-03-22 多重化回路

Country Status (1)

Country Link
JP (1) JPS59172849A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02152336A (ja) * 1988-12-05 1990-06-12 Nec Corp ディジタル多重化器

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5829234A (ja) * 1981-08-14 1983-02-21 Matsushita Electric Works Ltd 情報伝送装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5829234A (ja) * 1981-08-14 1983-02-21 Matsushita Electric Works Ltd 情報伝送装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02152336A (ja) * 1988-12-05 1990-06-12 Nec Corp ディジタル多重化器

Also Published As

Publication number Publication date
JPS6331979B2 (enrdf_load_stackoverflow) 1988-06-28

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