JPS59163828A - 微細パタ−ンの形成方法 - Google Patents

微細パタ−ンの形成方法

Info

Publication number
JPS59163828A
JPS59163828A JP3848683A JP3848683A JPS59163828A JP S59163828 A JPS59163828 A JP S59163828A JP 3848683 A JP3848683 A JP 3848683A JP 3848683 A JP3848683 A JP 3848683A JP S59163828 A JPS59163828 A JP S59163828A
Authority
JP
Japan
Prior art keywords
resist film
intermediate layer
forming
fine pattern
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3848683A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0522380B2 (enrdf_load_stackoverflow
Inventor
Katsuya Okumura
勝弥 奥村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP3848683A priority Critical patent/JPS59163828A/ja
Publication of JPS59163828A publication Critical patent/JPS59163828A/ja
Publication of JPH0522380B2 publication Critical patent/JPH0522380B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
JP3848683A 1983-03-09 1983-03-09 微細パタ−ンの形成方法 Granted JPS59163828A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3848683A JPS59163828A (ja) 1983-03-09 1983-03-09 微細パタ−ンの形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3848683A JPS59163828A (ja) 1983-03-09 1983-03-09 微細パタ−ンの形成方法

Publications (2)

Publication Number Publication Date
JPS59163828A true JPS59163828A (ja) 1984-09-14
JPH0522380B2 JPH0522380B2 (enrdf_load_stackoverflow) 1993-03-29

Family

ID=12526584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3848683A Granted JPS59163828A (ja) 1983-03-09 1983-03-09 微細パタ−ンの形成方法

Country Status (1)

Country Link
JP (1) JPS59163828A (enrdf_load_stackoverflow)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4841813A (enrdf_load_stackoverflow) * 1971-09-27 1973-06-19
JPS57143826A (en) * 1981-02-28 1982-09-06 Dainippon Printing Co Ltd Formation of resist pattern on gapped semiconductor substrate
JPS5812344A (ja) * 1981-07-16 1983-01-24 Nec Corp 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4841813A (enrdf_load_stackoverflow) * 1971-09-27 1973-06-19
JPS57143826A (en) * 1981-02-28 1982-09-06 Dainippon Printing Co Ltd Formation of resist pattern on gapped semiconductor substrate
JPS5812344A (ja) * 1981-07-16 1983-01-24 Nec Corp 半導体装置

Also Published As

Publication number Publication date
JPH0522380B2 (enrdf_load_stackoverflow) 1993-03-29

Similar Documents

Publication Publication Date Title
US6383952B1 (en) RELACS process to double the frequency or pitch of small feature formation
JPH0513384A (ja) 微細パターンの形成方法
JPS59163828A (ja) 微細パタ−ンの形成方法
JPH04348030A (ja) 傾斜エッチング法
JPH0458167B2 (enrdf_load_stackoverflow)
JPH03142466A (ja) 半導体装置の製造方法及びそれに用いられるマスク
JPS63307739A (ja) 半導体装置の製造方法
JPH0630352B2 (ja) パタ−ン化層形成法
JPH03104113A (ja) レジストパターンの形成方法
JPS62286230A (ja) 薄膜の選択食刻方法
JPH03263834A (ja) 半導体装置の製造方法
JPH02134819A (ja) 半導体装置の製造方法
JPS58100434A (ja) リフトオフ用スペ−サ−の形成方法
JPS62279633A (ja) パタ−ン形成方法
JPH03201530A (ja) 微細孔の形成方法
JPS6154629A (ja) フオト・レジストパタ−ンの形成方法
JPH01304457A (ja) パターン形成方法
JPH03250619A (ja) パターン形成方法
JPH04372114A (ja) パターン形成方法
JPH0350719A (ja) 微細パターンの形成方法
JPH0675360A (ja) レチクル及びそれを用いた半導体装置の製造方法
JPS62177922A (ja) 半導体装置の製造方法
JPH03261129A (ja) 半導体装置の製造方法
JPS63151023A (ja) 微小開口パタ−ン形成方法
JPH0458168B2 (enrdf_load_stackoverflow)