JPS59160325A - パルス入力回路 - Google Patents

パルス入力回路

Info

Publication number
JPS59160325A
JPS59160325A JP3338783A JP3338783A JPS59160325A JP S59160325 A JPS59160325 A JP S59160325A JP 3338783 A JP3338783 A JP 3338783A JP 3338783 A JP3338783 A JP 3338783A JP S59160325 A JPS59160325 A JP S59160325A
Authority
JP
Japan
Prior art keywords
input
pulse
terminal
gate
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3338783A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0213866B2 (enExample
Inventor
Shuichi Akimoto
秋本 修一
Kazumi Ueda
和美 上田
Masayuki Ozawa
正幸 小沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3338783A priority Critical patent/JPS59160325A/ja
Publication of JPS59160325A publication Critical patent/JPS59160325A/ja
Publication of JPH0213866B2 publication Critical patent/JPH0213866B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K21/00Details of pulse counters or frequency dividers
    • H03K21/02Input circuits

Landscapes

  • Manipulation Of Pulses (AREA)
  • Tests Of Electronic Circuits (AREA)
JP3338783A 1983-02-28 1983-02-28 パルス入力回路 Granted JPS59160325A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3338783A JPS59160325A (ja) 1983-02-28 1983-02-28 パルス入力回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3338783A JPS59160325A (ja) 1983-02-28 1983-02-28 パルス入力回路

Publications (2)

Publication Number Publication Date
JPS59160325A true JPS59160325A (ja) 1984-09-11
JPH0213866B2 JPH0213866B2 (enExample) 1990-04-05

Family

ID=12385178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3338783A Granted JPS59160325A (ja) 1983-02-28 1983-02-28 パルス入力回路

Country Status (1)

Country Link
JP (1) JPS59160325A (enExample)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52119351U (enExample) * 1976-03-08 1977-09-09

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52119351U (enExample) * 1976-03-08 1977-09-09

Also Published As

Publication number Publication date
JPH0213866B2 (enExample) 1990-04-05

Similar Documents

Publication Publication Date Title
EP0090590B1 (en) Semiconductor memory device
EP0855653B1 (en) Memory controller with a programmable strobe delay
JPH10232818A5 (enExample)
EP0798733A3 (en) A synchronous semiconductor memory integrated circuit, a method for accessing said memory and a system comprising such a memory
JPS61271666A (ja) ドロツプアウト検出装置
JPS6052513B2 (ja) 半導体記憶装置
JPS59160325A (ja) パルス入力回路
JPH0133052B2 (enExample)
SU1280600A1 (ru) Устройство дл ввода информации
JP3018431B2 (ja) 半導体メモリ用オンチップテスト方式
JPH0810724B2 (ja) ゲ−トアレイ及びメモリを有する半導体集積回路装置
SU1249588A1 (ru) Устройство дл контрол интегральных микросхем оперативной пам ти
JPS625722Y2 (enExample)
SU1316052A1 (ru) Устройство дл контрол пам ти
RU94044779A (ru) Программное временное устройство
KR880004480Y1 (ko) 버스 타이밍 보정회로
SU1640743A1 (ru) Устройство дл контрол одноразр дных блоков пам ти
JPH02250674A (ja) インバータのオンディレイ回路
JPS62124693A (ja) 半導体記憶素子
SU1361528A1 (ru) Устройство дл синхронизации пам ти
JPH02143989A (ja) 半導体記憶装置
JPS62272334A (ja) ウオツチドツグタイマ
JPS604328A (ja) 集積回路
JPH0721838B2 (ja) 計測装置
JPS6273171A (ja) 論理波形生成回路