JPS59157339U - phase synchronized circuit - Google Patents
phase synchronized circuitInfo
- Publication number
- JPS59157339U JPS59157339U JP5020483U JP5020483U JPS59157339U JP S59157339 U JPS59157339 U JP S59157339U JP 5020483 U JP5020483 U JP 5020483U JP 5020483 U JP5020483 U JP 5020483U JP S59157339 U JPS59157339 U JP S59157339U
- Authority
- JP
- Japan
- Prior art keywords
- phase
- circuit
- signal
- controlled oscillator
- voltage controlled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は読み出し回路系ブロック図、第２図は位相同期
回路のブロック図、第３図は読み出し信号と同期クロッ
ク、周期、ロック・レンジの関係を示すタイム・チャー
ト、第４図は本考案を適用した位相同期回路、第５図は
上記第４図回路の要部の詳細を示す回路図である。
５・・・読み出し回路７Ｊ）らの出力信号、６・・・位
相同期回路、７・・・読み出しで一タ、８・・・同期ク
ロック、１７・・・ゲイン切り換え回路、１８・・・６
６０９９力ウント回路。Figure 1 is a block diagram of the readout circuit system, Figure 2 is a block diagram of the phase-locked circuit, Figure 3 is a time chart showing the relationship between the readout signal, synchronization clock, period, and lock range, and Figure 4 is the invention of the present invention. FIG. 5 is a circuit diagram showing details of the main parts of the circuit shown in FIG. 4. 5... Output signal of the readout circuit 7J), 6... Phase synchronized circuit, 7... One-tap in readout, 8... Synchronized clock, 17... Gain switching circuit, 18... 6
6099 power und circuit.
Claims (1)
電圧制御発振器に帰還することにより、前記電圧制御発
振器を前記外来信号に同期化させる位相同期回路におい
て、前記外来信号が到来しない期間を検出する検出回路
手段と、当該検出回路手段からの検出信号にしたがって
位相同期回路のゲインを切り換える切り換え回路手段と
を備えることを特徴とする位相同期回路。In a phase synchronization circuit that synchronizes the voltage controlled oscillator with the external signal by feeding back a phase difference between the output signal of the voltage controlled oscillator and the external signal to the voltage controlled oscillator, detecting a period in which the external signal does not arrive. What is claimed is: 1. A phase-locked circuit comprising: a detection circuit means for detecting a signal from the phase-locked circuit; and a switching circuit means for switching a gain of the phase-locked circuit according to a detection signal from the detection circuit means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5020483U JPS59157339U (en) | 1983-04-06 | 1983-04-06 | phase synchronized circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5020483U JPS59157339U (en) | 1983-04-06 | 1983-04-06 | phase synchronized circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59157339U true JPS59157339U (en) | 1984-10-22 |
Family
ID=30180678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5020483U Pending JPS59157339U (en) | 1983-04-06 | 1983-04-06 | phase synchronized circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59157339U (en) |
-
1983
- 1983-04-06 JP JP5020483U patent/JPS59157339U/en active Pending
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