JPS633644U - - Google Patents
Info
- Publication number
- JPS633644U JPS633644U JP9718286U JP9718286U JPS633644U JP S633644 U JPS633644 U JP S633644U JP 9718286 U JP9718286 U JP 9718286U JP 9718286 U JP9718286 U JP 9718286U JP S633644 U JPS633644 U JP S633644U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- synchronization
- voltage controlled
- output
- controlled oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001360 synchronised effect Effects 0.000 claims description 4
- 238000001514 detection method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
Description
第１図は本考案による同期型受信機の構成図、
第２図は従来の同期型受信機の構成図である。
図において、１は受信信号入力端子、２は同期
信号出力端子、３は位相検波器、４はループフイ
ルタ、５は加算器、６は電圧制御発振器、７は同
期検出回路、８はサーチ発振器、９はサーチ停止
信号、１０はＯＲ回路、１１は同期信号保持回路
である。なお、図中、同一又は相当部分には同一
符号を付して示してある。
Figure 1 is a configuration diagram of a synchronous receiver according to the present invention.
FIG. 2 is a block diagram of a conventional synchronous receiver. In the figure, 1 is a received signal input terminal, 2 is a synchronization signal output terminal, 3 is a phase detector, 4 is a loop filter, 5 is an adder, 6 is a voltage controlled oscillator, 7 is a synchronization detection circuit, 8 is a search oscillator, 9 is a search stop signal, 10 is an OR circuit, and 11 is a synchronization signal holding circuit. In the drawings, the same or corresponding parts are designated by the same reference numerals.
Claims (1)
制御発振器と、上記受信信号入力端子から入力さ
れる受信信号と上記電圧制御発振器の出力信号と
を位相比較する位相検波器と、上記位相検波器の
出力信号を平滑するループフイルタとサーチ発振
器と、上記ループフイルタ及びサーチ発振器の出
力信号を加算し、電圧制御発振器の出力信号を制
御する信号を出力する加算器と、上記電圧制御発
振器の出力信号と上記受信信号入力端子より入力
される受信信号とが位相同期した時、同期信号を
出力する同期検出回路と、上記同期検出回路の出
力信号がＯＦＦとなつても、一定時間同期信号が
ＯＮとなる様に同期信号を保持する同期信号保持
回路と、上記同期検出回路と同期信号保持回路の
いずれかがＯＮ状態の時、上記サーチ発振器のサ
ーチを停止させるサーチ停止信号を出力するＯＲ
回路とを備えたことを特徴とする位相同期型受信
機。 a received signal input terminal, a synchronizing signal output terminal, a voltage controlled oscillator, a phase detector that compares the phase of the received signal input from the received signal input terminal and the output signal of the voltage controlled oscillator; a loop filter and a search oscillator that smooth the output signal; an adder that adds the output signals of the loop filter and the search oscillator and outputs a signal that controls the output signal of the voltage controlled oscillator; and an output signal of the voltage controlled oscillator. When the received signal input from the received signal input terminal is phase synchronized, the synchronization detection circuit outputs the synchronization signal and the synchronization signal remains ON for a certain period of time even if the output signal of the synchronization detection circuit is OFF. A synchronization signal holding circuit that holds a synchronization signal as shown in FIG.
A phase synchronized receiver characterized by comprising a circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9718286U JPS633644U (en) | 1986-06-25 | 1986-06-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9718286U JPS633644U (en) | 1986-06-25 | 1986-06-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS633644U true JPS633644U (en) | 1988-01-11 |
Family
ID=30963865
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9718286U Pending JPS633644U (en) | 1986-06-25 | 1986-06-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS633644U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000027111A1 (en) * | 1998-11-04 | 2000-05-11 | Sharp Kabushiki Kaisha | Digital broadcast receiving system |
-
1986
- 1986-06-25 JP JP9718286U patent/JPS633644U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000027111A1 (en) * | 1998-11-04 | 2000-05-11 | Sharp Kabushiki Kaisha | Digital broadcast receiving system |
| US6710814B1 (en) | 1998-11-04 | 2004-03-23 | Sharp Kabushiki Kaisha | Digital broadcast receiving system for detecting short-breaks and holding information based on same |
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