JPS6344567U - - Google Patents
Info
- Publication number
- JPS6344567U JPS6344567U JP13780786U JP13780786U JPS6344567U JP S6344567 U JPS6344567 U JP S6344567U JP 13780786 U JP13780786 U JP 13780786U JP 13780786 U JP13780786 U JP 13780786U JP S6344567 U JPS6344567 U JP S6344567U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- synchronization
- reset pulse
- vertical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001360 synchronised effect Effects 0.000 claims description 5
- 238000000926 separation method Methods 0.000 claims description 3
- 239000002131 composite material Substances 0.000 claims description 2
- 230000010355 oscillation Effects 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Synchronizing For Television (AREA)
Description
第１図は本考案の同期回路の一実施例を示すブ
ロツク図、第２図は第１図における同期分離回路
及び同期判定回路の具体的な構成の一例を示す回
路図、第３図は従来の同期回路を示すブロツク図
である。
２１……複合映像信号入力端子、２２……同期
分離回路、２３……位相比較器、２４……水平周
波数発振器、２５……分周器、２６……水平同期
信号出力端子、２７……垂直カウンター、２８…
…垂直同期信号出力端子、２９……同期判定回路
、３０……スイツチ回路。
FIG. 1 is a block diagram showing one embodiment of the synchronization circuit of the present invention, FIG. 2 is a circuit diagram showing an example of a specific configuration of the synchronization separation circuit and synchronization determination circuit in FIG. 1, and FIG. 3 is a conventional circuit diagram. FIG. 2 is a block diagram showing a synchronous circuit of FIG. 21...Composite video signal input terminal, 22...Sync separation circuit, 23...Phase comparator, 24...Horizontal frequency oscillator, 25...Frequency divider, 26...Horizontal synchronization signal output terminal, 27...Vertical Counter, 28...
... Vertical synchronization signal output terminal, 29 ... Synchronization determination circuit, 30 ... Switch circuit.
Claims (1)
号を分離するための同期分離回路と、 自励の水平発振手段を有し、その発振周波数と
前記同期分離回路にて分離した水平同期信号との
位相差を検出し、前記水平発振手段の発振周波数
の変動を自動的に制御するように構成した自動周
波数制御回路と、 この自動周波数制御回路より得られる水平同期
信号をクロツクとしてカウント動作を行ない、垂
直周期の内部リセツトパルスを出力する機能を有
すると共にリセツトパルス入力のタイミングで垂
直同期信号を出力する機能を有した垂直カウンタ
ーと、 前記同期分離回路にて分離した同期信号の有無
を判定するための同期判定回路と、 この同期判定回路からの判定信号にて前記垂直
カウンターへのリセツトパルス入力を切り換える
ためのスイツチ回路であつて、有信号時は前記同
期分離回路にて分離した垂直同期信号を選択し、
無信号時は前記垂直カウンターからの内部リセツ
トパルスを選択するスイツチ回路とを具備したこ
とを特徴とする同期回路。[Claims for Utility Model Registration] A synchronous separator circuit for separating a synchronous signal from a composite video signal supplied as an input, and a self-excited horizontal oscillation means, the oscillation frequency of which is separated by the synchronous separator circuit. an automatic frequency control circuit configured to detect a phase difference with the horizontal synchronization signal obtained by the horizontal oscillation means and automatically control fluctuations in the oscillation frequency of the horizontal oscillation means; and a horizontal synchronization signal obtained from the automatic frequency control circuit. a vertical counter having a function of performing a counting operation and outputting an internal reset pulse with a vertical period and a function of outputting a vertical synchronization signal at the timing of inputting the reset pulse; A synchronization determination circuit for determining the presence or absence of the synchronization, and a switch circuit for switching the reset pulse input to the vertical counter based on the determination signal from the synchronization determination circuit, and when the signal is present, the synchronization separation circuit separates the reset pulse input. Select the vertical sync signal that was
A synchronous circuit comprising a switch circuit that selects an internal reset pulse from the vertical counter when there is no signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13780786U JPS6344567U (en) | 1986-09-10 | 1986-09-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13780786U JPS6344567U (en) | 1986-09-10 | 1986-09-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6344567U true JPS6344567U (en) | 1988-03-25 |
Family
ID=31042205
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13780786U Pending JPS6344567U (en) | 1986-09-10 | 1986-09-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6344567U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01309570A (en) * | 1988-06-08 | 1989-12-13 | Toshiba Corp | Vertical synchronization reproducing circuit |
| JPH01314476A (en) * | 1988-06-14 | 1989-12-19 | Sanyo Electric Co Ltd | Vertical deflection circuit |
| JPH02109470A (en) * | 1988-10-19 | 1990-04-23 | Sanyo Electric Co Ltd | Vertical deflection circuit |
-
1986
- 1986-09-10 JP JP13780786U patent/JPS6344567U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01309570A (en) * | 1988-06-08 | 1989-12-13 | Toshiba Corp | Vertical synchronization reproducing circuit |
| JPH01314476A (en) * | 1988-06-14 | 1989-12-19 | Sanyo Electric Co Ltd | Vertical deflection circuit |
| JPH02109470A (en) * | 1988-10-19 | 1990-04-23 | Sanyo Electric Co Ltd | Vertical deflection circuit |
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