JPH0377558U - - Google Patents
Info
- Publication number
- JPH0377558U JPH0377558U JP13731889U JP13731889U JPH0377558U JP H0377558 U JPH0377558 U JP H0377558U JP 13731889 U JP13731889 U JP 13731889U JP 13731889 U JP13731889 U JP 13731889U JP H0377558 U JPH0377558 U JP H0377558U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- controlled oscillator
- voltage controlled
- horizontal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 8
- 238000000926 separation method Methods 0.000 claims description 5
- 230000010355 oscillation Effects 0.000 claims 1
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 230000003321 amplification Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Synchronizing For Television (AREA)
Description
第1図は本考案の一実施例による同期信号検出
回路の構成を示すブロツク図、第2図は従来のテ
レビジヨン受像機全体の回路構成を示すブロツク
図、第3図は第2図における同期信号検出回路の
詳細を示すブロツク図、第4図a〜cは従来の同
期信号検出回路を用いた場合の画像表示状態を示
す図である。
12……チユーナ、13……中間周波増幅回路
、14……映像検波回路、15……クロマ信号処
理回路、16……表示駆動回路、17……表示部
、18……同期信号検出回路、19……制御部、
23……キー入力部、31……同期信号分離回路
、32……位相比較回路、33a……第1ループ
フイルタ、33b……第2ループフイルタ、34
……電圧制御発振器、35……モード切換スイツ
チ。
FIG. 1 is a block diagram showing the configuration of a synchronization signal detection circuit according to an embodiment of the present invention, FIG. 2 is a block diagram showing the entire circuit configuration of a conventional television receiver, and FIG. 3 is a synchronization signal detection circuit in FIG. FIGS. 4a to 4c are block diagrams showing details of the signal detection circuit, and are diagrams showing image display states when a conventional synchronization signal detection circuit is used. 12... Tuner, 13... Intermediate frequency amplification circuit, 14... Video detection circuit, 15... Chroma signal processing circuit, 16... Display drive circuit, 17... Display unit, 18... Synchronization signal detection circuit, 19 ...control section,
23...Key input unit, 31...Synchronizing signal separation circuit, 32...Phase comparison circuit, 33a...First loop filter, 33b...Second loop filter, 34
...Voltage controlled oscillator, 35...Mode changeover switch.
Claims (1)
信号分離回路と、水平パルス信号を発生する電圧
制御発振器と、上記同期信号分離回路により分離
された水平同期信号と上記電圧制御発振器から出
力される水平パルス信号を比較して位相差を検出
する位相比較回路と、この位相比較回路の出力信
号が入力されるそれぞれ時定数の異なる第1及び
第2のループフイルタと、この第1及び第2のル
ープフイルタの出力信号をテレビ受信モード時と
ビデオ入力モード時とで切換え、上記電圧制御発
振器に発振制御信号として入力する切換手段とを
具備したことを特徴とする同期信号検出回路。 (2) 映像信号中の水平同期信号を分離する同期
信号分離回路と、水平パルス信号を発生する電圧
制御発振器と、上記同期信号分離回路により分離
された水平同期信号と上記電圧制御発振器から出
力される水平パルス信号を比較して位相差を検出
する位相比較回路と、この位相比較回路の出力端
と電圧制御発振器の入力端との間に設けられ、2
種類の時定数が選択可能なループフイルタと、こ
のループフイルタの時定数をテレビ受信モード時
とビデオ入力モード時とで切換える切換手段とを
具備したことを特徴とする同期信号検出回路。[Claims for Utility Model Registration] (1) A synchronization signal separation circuit that separates a horizontal synchronization signal in a video signal, a voltage controlled oscillator that generates a horizontal pulse signal, and a horizontal synchronization signal separated by the synchronization signal separation circuit. and a phase comparison circuit that detects a phase difference by comparing the horizontal pulse signals outputted from the voltage controlled oscillator, and first and second loop filters each having a different time constant to which the output signal of the phase comparison circuit is input. and switching means for switching the output signals of the first and second loop filters between a television reception mode and a video input mode, and inputting the output signals to the voltage controlled oscillator as an oscillation control signal. Synchronous signal detection circuit. (2) A sync signal separation circuit that separates a horizontal sync signal in a video signal, a voltage controlled oscillator that generates a horizontal pulse signal, and a horizontal sync signal separated by the sync signal separation circuit and output from the voltage controlled oscillator. a phase comparator circuit for detecting a phase difference by comparing horizontal pulse signals, and a phase comparator circuit provided between the output terminal of the phase comparator circuit and the input terminal of the voltage controlled oscillator;
A synchronizing signal detection circuit comprising: a loop filter from which different types of time constants can be selected; and switching means for switching the time constant of the loop filter between a television reception mode and a video input mode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13731889U JPH0377558U (en) | 1989-11-29 | 1989-11-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13731889U JPH0377558U (en) | 1989-11-29 | 1989-11-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0377558U true JPH0377558U (en) | 1991-08-05 |
Family
ID=31684482
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13731889U Pending JPH0377558U (en) | 1989-11-29 | 1989-11-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0377558U (en) |
-
1989
- 1989-11-29 JP JP13731889U patent/JPH0377558U/ja active Pending
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