JPH08251445A - Weak electric field detection circuit - Google Patents

Abstract

PURPOSE: To stably operate a frequency control loop without causing malfunction for detection of a weak electric field in the case of non-signal channel reception or VTR reproduction. CONSTITUTION: A synchronizing separator circuit 13, a phase detection circuit 14, an oscillator 15, and a horizontal system count-down circuit 16 form a horizontal synchronizing frequency control loop. A secondary differentiation circuit 12 obtains the secondary differentiation output of a video signal. A horizontal system count-down circuit 16 obtains a mask pulse for a pattern period and a vertical system count-down circuit 17 obtains a mask pulse for a vertical period. When noise at a position of a DC level of a horizontal synchronizing signal exceeds a threshold level, a noise detection circuit 18 provides a noise detection signal to a weak electric field detection logic circuit 23. The weak electric field detection logic circuit 23 decreases the detection output of the phase detection circuit 14 when a horizontal locking is set and only when a standard vertical synchronizing signal is received in the case of high noise level to suppress horizontal jitter.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a weak electric field detection circuit used in a color television receiver.

[0002]

2. Description of the Related Art In a color television receiving system, horizontal jitter increases when the receiving environment becomes a weak electric field.
Therefore, in order to reduce the horizontal jitter, it is possible to detect the weak electric field and reduce the detection current in the horizontal frequency control loop.

FIG. 2A shows a weak electric field detection circuit. A video signal is introduced to the input terminal 11, and the video signal is supplied to the secondary differentiating circuit 12 and the sync separation circuit 13. The horizontal sync signal separated by the sync separation circuit 13 is input to the phase detection circuit 14, where it is compared in phase with the reference pulse from the horizontal system countdown circuit 16.
The detection output (frequency control voltage) obtained from the phase detection circuit 14 is supplied to the control terminal of the oscillator 15,
Control the oscillation frequency of. The output of the oscillator 15 (n times the horizontal frequency) is input to the horizontal system countdown circuit 16 as a clock, and the horizontal system countdown circuit 16 is counted by counting (dividing to 1 / n).
Creates a clock for the reference pulse and the vertical system countdown circuit 17.

The horizontal countdown circuit 16 creates a mask pulse for a picture period and supplies it to the noise detection circuit 18. On the other hand, the composite sync signal separated by the sync separation circuit 13 is also input to the vertical sync separation circuit 19. The vertical sync separation circuit 19 separates the vertical sync signal and supplies the separated output to the reset terminal of the vertical system countdown circuit 17. Vertical countdown circuit 17
Uses the horizontal sync pulse of the previous horizontal cycle as a clock input, counts down with this clock, and creates a V period mask pulse near the vertical sync period. This V period mask pulse is also input to the noise detection circuit 18.

The differential output from the secondary differential circuit 12 is supplied to the noise detection circuit 18. Here, when the differential output is masked by the mask pulse for the picture period and the mask pulse for the V period (262H to H), the rest is only the component of the horizontal synchronizing period (original DC level). When the AC component by the second derivative exists in the component of this period, this component can be regarded as a noise component. FIG. 2B shows an example of the signal waveform of each part. Noise detection circuit 18
When this noise component exceeds a certain threshold,
It is determined that the current reception state is under a weak electric field environment, and a control signal is given to the phase detection circuit 14 in the direction of decreasing the detection current. As a result, fluctuations in horizontal synchronization are reduced, and horizontal jitter is reduced.

[0006]

[Problems to be Solved by the Invention]

a: When the tuner selects a non-signal channel,
Since white noise is input as a video signal, the noise detection circuit 18 determines that there is a lot of noise.
Then, the detection current is reduced at the time of selecting a non-signal channel, but in such a state, detection efficiency is low, so that it takes time to pull in the channel when the tuner is switched to the signal channel.

B: The bar noise appearing in the fast forward reproduction / rewind reproduction of the VTR appears not only in the picture period but also in the horizontal synchronizing period. Therefore, in the fast forward / rewind reproduction of the VTR, the noise detection circuit 18 determines that the noise is large due to the bar noise. In the case of VTR reproduction, there is skew in the signal, but if the detection current of the frequency control loop is reduced, the effect cannot be prevented due to skew and screen bending occurs.

Therefore, an object of the present invention is to provide a weak electric field detection circuit which prevents the operation of the frequency control loop from being adversely affected by a malfunction of weak electric field detection during reception of a non-signal channel or VTR reproduction. Is.

[0009]

SUMMARY OF THE INVENTION The present invention is directed to a phase detection circuit for detecting the phase of a horizontal synchronizing signal separated from a video signal and a reference pulse, and an oscillator whose oscillation frequency is controlled by the detection output of the phase detection circuit. A horizontal frequency control loop having pulse generating means for generating the reference pulse synchronized with the horizontal synchronizing signal by using an oscillation output of the oscillator; and a differentiating means for obtaining a secondary differential signal of the video signal, A first mask pulse generating means for generating a first mask pulse which is synchronized with the horizontal synchronizing signal and masks a period other than the horizontal synchronizing signal period; a means for separating the vertical synchronizing signal from the video signal; Second mask pulse generating means for synchronizing and generating a second mask pulse for masking a vertical period, the first mask pulse and the second mask pulse, and Noise detection means for detecting the amplitude of the signal obtained as a result of masking the secondary differential signal and obtaining a noise presence / absence determination output; Lock detection means, standard detection means for monitoring the vertical synchronization signal to determine whether the video signal is standard or non-standard, and horizontal lock detection means for determining the horizontal lock state, and the standard detection Weak electric field detection logic means for obtaining a detection output indicating that the electric field is weak only when the noise detection means detects that the noise is large.

[0010]

By the above means, the weak electric field detection logic means is in the horizontal lock state even if a large amount of noise is detected,
Only when the vertical synchronization is standard, the detection output of the phase detection circuit in the frequency control loop is reduced to operate so as to suppress the horizontal jitter.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of the present invention. The same parts as those of the conventional circuit shown in FIG. 2 are designated by the same reference numerals. A video signal is introduced to the input terminal 11, and this video signal is
It is supplied to the secondary differentiating circuit 12 and the sync separating circuit 13.

The secondary differential output obtained by the secondary differential circuit 12 is supplied to the noise detection circuit 18. The mask period is set in the noise detection circuit 18, and when the noise level is equal to or higher than the set threshold value outside the mask period, the noise detection signal is output and input to the weak electric field detection logic circuit 23 described later. .

The horizontal sync signal separated by the sync separation circuit 13 is input to the phase detection circuit 14 where it is compared in phase with the reference pulse from the horizontal system countdown circuit 16. The detection output (frequency control voltage) obtained from the phase detection circuit 14 is supplied to the control terminal of the oscillator 15 to control the oscillation frequency of the oscillator 15. The output of the oscillator 15 (n times the horizontal frequency) is input to the horizontal system countdown circuit 16 as a clock, and the horizontal system countdown circuit 1 is counted by counting (dividing into 1 / n) this clock.
Reference numeral 6 creates a clock for the reference pulse and the vertical system countdown circuit 17.

The horizontal countdown circuit 16 creates a mask pulse for the picture period and supplies it to the noise detection circuit 18. On the other hand, the composite sync signal separated by the sync separation circuit 13 is also input to the vertical sync separation circuit 19. The vertical sync separation circuit 19 separates the vertical sync signal and supplies the separated output to the reset terminal of the vertical system countdown circuit 17. Vertical countdown circuit 17
Uses the horizontal sync pulse of the previous horizontal cycle as a clock input, counts down with this clock, and creates a V period mask pulse near the vertical sync period. This V period mask pulse is also input to the noise detection circuit 18.

The noise detection circuit 18 is supplied with the differential output from the secondary differential circuit 12. Here, when the differential output is masked by the mask pulse for the picture period and the mask pulse for the V period (262H to H), the rest is only the component of the horizontal synchronizing period (original DC level). When the AC component by the second derivative exists in the component of this period, this component can be regarded as a noise component.

Here, in this circuit, a horizontal lock detection circuit 21 for detecting whether or not the horizontal sync signal in the sync signals obtained from the sync separation circuit 13 is in a locked state, and a vertical sync separation circuit 19 for separation. It has a standard detection circuit 22 for detecting whether or not the vertical synchronizing signal present has a standard frequency. The horizontal lock detection circuit 21 counts the number of horizontal sync signals included in one vertical sync period of the input video signal, and when the counted number is a certain number or more, it is determined to be in the horizontal lock state. Further, the standard detection circuit 22 determines that the input video signal is a non-standard signal when one vertical synchronizing period deviates from the 262.5 horizontal period, and maintains the 262.5 horizontal period continuously for three vertical synchronizing periods or more. Sometimes it is judged as a standard signal.

The lock detection signal obtained from the horizontal lock detection circuit 21 and the standard detection signal obtained from the standard detection circuit 22 are supplied to the weak electric field detection logic circuit 23. The noise detection signal from the noise detection circuit 18 is input to the weak electric field detection logic circuit 23.

In the weak electric field detection logic circuit 23, when the horizontal lock detection circuit 21 judges "horizontal lock state" and the standard detection circuit 22 judges "standard signal", the noise detection circuit 18 detects The detection current of the phase detection circuit 14 is set to be switched based on the result. When the horizontal lock detection circuit 21 detects that the horizontal is in the “non-locked state” and when the standard detection circuit 22 determines the “non-standard signal”, the noise detection circuit 18 detects the result. However, the AFC detection current is not switched.

According to the circuit configuration described above, the horizontal lock detection circuit 21 and the standard detection circuit 22 are provided, but it is needless to say that the improvement effect can be obtained as compared with the conventional circuit even if either one is provided. Is.

Further, the present invention can be used not only as a switching signal for reducing the AFC detection current of the frequency control loop when a weak electric field is detected, but also for various purposes. For example, it can be used for adjusting and displaying the tuning voltage.

As described above, according to the circuit of the present invention,
When the tuner selects a non-signal channel (horizontal lock is unlocked), white noise is input as a video signal, and the AFC detection current is reduced even if the noise detection circuit 18 determines that there is a lot of noise. Since the detection efficiency does not decrease, the pull-in time when the channel is switched and the existing signal channel is selected can be shortened. Also, the bar noise appearing in the VTR fast-forward reproduction / rewinding reproduction (vertical synchronization is non-standard) appears not only in the picture period but also in the horizontal synchronization period, and the noise detection circuit 18 judges that there is much noise. Even AF
Since the C detection current is not reduced, the detection efficiency does not decrease, and the skew of the screen does not increase due to skew, which contributes to obtaining a stable image.

[0022]

As described above, according to the present invention,
There is no malfunction of weak electric field detection during reception of a non-signal channel or VTR reproduction, and the frequency control loop operates stably.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing a conventional weak electric field detection circuit, a frequency control loop, and operation waveforms thereof.

3 is a diagram showing further operating waveforms of the circuit of FIG.

[Explanation of symbols]

13 ... Sync separation circuit, 14 ... Phase detection circuit, 15 ... Oscillator, 16 ... Horizontal system countdown circuit, 17 ... Vertical system countdown circuit, 18 ... Noise detection circuit, 19 ... Vertical sync separation circuit, 21 ... Horizontal lock detection circuit, 22 ... Standard detection circuit, 23 ... Weak electric field detection logic circuit.

Claims (3)

[Claims] 1. A phase detection circuit for performing phase detection of a horizontal synchronizing signal separated from a video signal and a reference pulse, an oscillator whose oscillation frequency is controlled by a detection output of this phase detection circuit, and an oscillation output of this oscillator. And a horizontal frequency control loop having pulse generating means for generating the reference pulse synchronized with the horizontal synchronizing signal, differentiating means for obtaining a secondary differential signal of the video signal, and synchronizing with the horizontal synchronizing signal. First mask pulse generating means for generating a first mask pulse for masking a period other than a horizontal synchronizing signal period, means for separating a vertical synchronizing signal from the video signal, and a vertical period masked in synchronization with the vertical synchronizing signal. Second
Second mask pulse generating means for generating the mask pulse of (1), the amplitude of the signal obtained as a result of masking the secondary differential signal with the first mask pulse and the second mask pulse, and the presence or absence of noise A noise detection unit that obtains a determination output, a horizontal lock detection unit that monitors the horizontal synchronization signal to determine whether it is in a horizontal locked state or a non-locked state, and a vertical synchronization signal that is monitored so that the video signal is standard. There is a standard detection means for determining whether there is a standard or non-standard, the horizontal lock detection means determines a horizontal lock state, the standard detection means determines a standard, the noise detection means detects a lot of noise A weak electric field detection circuit comprising: a weak electric field detection logic means for obtaining a detection output indicating that the electric field is weak. 2. The weak electric field detection according to claim 1, wherein the weak electric field logic means controls the output detection current of the phase detection circuit of the frequency control loop to decrease when the weak electric field is detected. circuit. 3. The horizontal lock detecting means counts the horizontal synchronizing signals in one cycle of the vertical synchronizing signal, and determines whether or not the number of correlations between the horizontal synchronizing signal and the vertical synchronizing signal exceeds a count. The standard detection means counts the horizontal period within one cycle of the vertical synchronizing signal, and determines whether the horizontal lock state or the unlocked state is the horizontal period of the normal signal format. The weak electric field detection circuit according to claim 1, wherein it is determined whether or not they match with each other to determine whether the electric field is standard or non-standard.