JPH01147576U - - Google Patents
Info
- Publication number
- JPH01147576U JPH01147576U JP1988043655U JP4365588U JPH01147576U JP H01147576 U JPH01147576 U JP H01147576U JP 1988043655 U JP1988043655 U JP 1988043655U JP 4365588 U JP4365588 U JP 4365588U JP H01147576 U JPH01147576 U JP H01147576U
- Authority
- JP
- Japan
- Prior art keywords
- synchronization
- television
- circuit
- synchronization state
- detection means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 8
Landscapes
- Synchronizing For Television (AREA)
Description
第１図はこの考案の一実施例を示す回路図、第
２図はこの考案の他の実施例を示す回路図、第３
図は第２図のＤ／Ａ変換器の例を示す回路図、第
４図は第２図の回路の動作を説明するために示し
た信号波形図、第５図は第２図のＤ／Ａ変換器の
他の例を示す回路図、第６図乃至第１０図はそれ
ぞれこの考案の他の実施例を示す回路図、第１１
図は従来のテレビジヨン受信機のデコーダを示す
回路図である。
２…Ａ／Ｄ変換器、３…ＰＬＬ回路、４…位相
比較器、５…フイルタ、６…電圧制御発振器、７
…分周器、８…ビデオ信号処理回路、９…Ｄ／Ａ
変換器、１０…同期はずれ検出器、１１…アンド
回路、１６，１７，１８，１９，２２，２３…ス
イツチ、２０…信号発生器、２１…同期信号発生
器。
Figure 1 is a circuit diagram showing one embodiment of this invention, Figure 2 is a circuit diagram showing another embodiment of this invention, and Figure 3 is a circuit diagram showing another embodiment of this invention.
2 is a circuit diagram showing an example of the D/A converter in FIG. 2, FIG. 4 is a signal waveform diagram shown to explain the operation of the circuit in FIG. FIGS. 6 to 10 are circuit diagrams showing other examples of the A converter, and FIG. 11 is a circuit diagram showing other embodiments of this invention, respectively.
The figure is a circuit diagram showing a decoder of a conventional television receiver. 2... A/D converter, 3... PLL circuit, 4... Phase comparator, 5... Filter, 6... Voltage controlled oscillator, 7
...Frequency divider, 8...Video signal processing circuit, 9...D/A
Converter, 10... Out-of-synchronization detector, 11... AND circuit, 16, 17, 18, 19, 22, 23... Switch, 20... Signal generator, 21... Synchronization signal generator.
Claims (1)
レビジヨン信号を受信処理して線順次の映像信号
を得るテレビジヨン受信機において、 受信テレビジヨン信号の同期と内部同期回路と
の同期がとれているか否かを検出する同期状態検
出手段と、 この同期状態検出手段が同期はずれ状態の判定
出力を得たときに、テレビジヨン信号処理回路の
出力部に所定の画面を得る信号を強制的に出力さ
せる切換え手段とを具備したことを特徴とするテ
レビジヨン受信機。[Claims for Utility Model Registration] Synchronization of received television signals and an internal synchronization circuit in a television receiver that obtains line-sequential video signals by receiving and processing television signals converted into digital information different from line-sequential ones. a synchronization state detection means for detecting whether or not synchronization is established; and when the synchronization state detection means obtains an output for determining an out-of-synchronization state, a predetermined screen is displayed at the output section of the television signal processing circuit. 1. A television receiver comprising switching means for forcibly outputting a signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988043655U JPH01147576U (en) | 1988-03-31 | 1988-03-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988043655U JPH01147576U (en) | 1988-03-31 | 1988-03-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01147576U true JPH01147576U (en) | 1989-10-12 |
Family
ID=31270047
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988043655U Pending JPH01147576U (en) | 1988-03-31 | 1988-03-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01147576U (en) |
-
1988
- 1988-03-31 JP JP1988043655U patent/JPH01147576U/ja active Pending
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