JP2667852B2 - In-vehicle television receiver - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver, and more particularly to an in-vehicle television receiver capable of providing a good image even when mounted on a car.

[Conventional technology]

2. Description of the Related Art Conventionally, as an example of an on-vehicle television receiver, an example of Japanese Patent Application Laid-Open No. 56-10780 has been known. FIG. 5 is a diagram showing this television receiver, in which 501 is a diversity antenna, 502 is a switching circuit, 503 is a television receiver, and 504 is a control circuit.

In this conventional example, four diversity antennas 501 mounted on a moving body and one of the outputs of those antennas are used.
Switching circuit 50 for switching one to be connected to an antenna input circuit of a television receiver 503 mounted on the moving body.
2 and the switching circuit 502 is switched in a time-division manner by a sampling switching control signal generated during the vertical retrace period of the television video signal, and the level of the detection output of each antenna is compared. A control circuit 504 that is connected to the antenna input circuit of the television receiver 503 and thereafter maintains the state until the next vertical retrace period is provided. However, the optimum receiving state is always maintained.

[Problems to be solved by the invention]

In such a conventional technique, an input wave having the maximum electric field strength can be selected and received by switching the antenna as needed, so that a good image can be provided in a relatively good reception environment. However, when there are many buildings and many ghosts occur in the center of the city, there is a problem that the effect cannot be sufficiently exhibited for the following reasons.

(1) If the electric field strength is strong, the ghost is not always small. Therefore, even if an input wave having the maximum electric field strength is selected, the ghost is large, so that it may be difficult to view an image.

(2) If there is a ghost, as the car moves,
Generally, the ghost situation also changes. Therefore, as a result of the ghost becoming very large, the ghost becomes the main signal, and the conventional main signal may be regarded as a ghost. This means that: That is, as a result of switching the antenna, a time lag occurs in the main signal before and after the switching. The synchronization circuit of the receiver always follows so as to synchronize with the currently input signal, but cannot operate instantaneously and operates with a certain time constant. Therefore, during this time, a deviation occurs between the video signal and the synchronization signal created by the synchronization circuit, and the video is disturbed. Furthermore, when the antenna is frequently switched, this image disturbance also occurs frequently, and the reception quality is significantly reduced.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned disadvantages of the prior art and to provide an on-vehicle television receiver capable of obtaining a good image even in the presence of a ghost.

[Means for solving the problem]

In order to achieve the above object, according to the present invention, (1) when switching control of a diversity antenna, not only the optimal antenna is determined based on the electric field strength but also the magnitude of the ghost, and the electric field strength is large and the ghost is determined. Select an input wave with a small.

(2) A means for detecting the time lag of the main signal before and after the antenna switching is provided, and the signal time lag before and after the antenna switching is eliminated by controlling the delay of the input signal so as to eliminate the phase difference.

It is characterized by the following.

[Action]

Means for detecting the magnitude of the electric field strength and the ghost include a diversity antenna, a changeover switch, a tuner, a detection circuit,
It has a vertical synchronization signal sampling circuit and a signal level determination circuit as main constituent blocks. The vertical synchronization signal sampling circuit stores a predetermined period before and after the leading edge of the vertical synchronization signal. The signal level determination circuit obtains the level of the sampled vertical synchronizing signal leading edge and the level of the ghost signal existing in a predetermined period before and after the level, and calculates, for example, the ratio of the latter to the former. If the above operation is performed by switching the antennas and the antenna having the smallest ratio is selected, an input wave with a strong electric field and a small ghost can be selected.

Next, the means for eliminating the signal time lag before and after the antenna switching has the vertical synchronization signal sampling circuit, the signal time difference determination circuit, and the variable delay line as main constituent blocks. The signal time difference determination circuit refers to the leading edge of the vertical synchronization signal sampled by the vertical synchronization signal sampling circuit corresponding to before and after the antenna switching, and determines the signal time difference before and after the switching. The time lag of the signal is obtained in this manner, and the result is given to the subsequent variable delay line, and the time lag is eliminated by appropriately controlling the delay amount.

〔Example〕

Hereinafter, specific embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing an antenna selection system according to an embodiment of the present invention. In FIG. 1, reference numeral 101 denotes a diversity antenna using four antennas A, B, C, and D; 102, an antenna changeover switch; Tuner, 104: IF (intermediate frequency) / detection circuit, 105: A / D converter, 106: memory changeover switch, 107 to 110: memories A, B, C, D, 111 to 114, respectively
Are differentiating circuits A, B, C, D, 115 to 118, respectively, and the maximum value / next maximum value detecting circuits A, B, C, D, 119 to 122 are respectively dividing circuits A, B. , C, D, 123 are minimum value detection circuits, 124
Is an antenna selection signal generation circuit, 125 is a synchronization circuit, 126
Is an antenna sequential switching signal generation circuit.

Hereinafter, the operation of the present antenna selection method will be described with reference to the operation timing chart of FIG. First,
It is assumed that an input signal as shown in FIG. 4A arrives at the diversity antenna 101. As shown, the input signal is composed of a plurality of fields, and one field is composed of a vertical blanking period and other video periods. The antenna changeover switch 102 operates according to a field reference signal generated from a synchronization circuit 125 described later, and each time a vertical blanking period is input, the antenna and the antenna are sequentially switched as shown in FIG.
A, B, C, D are switched, and the switched signal is sent to the electronic tuner 10
3. Hereinafter, the signal is sent to the IF / detection circuit 104 and the A / D converter 105. A / D
The converter 105 converts the input signal into a digital signal using a clock generated by the synchronization circuit 125. The video signals during the vertical blanking period, which are output from the memory A, B, C, and D (101), are respectively transmitted by the antennas A, B, C, and D (101) by the memory changeover switch 106 that operates simultaneously with the antenna changeover switch.
It is stored in (107 to 110). The signals in the vertical blanking period stored in these memories include a predetermined period before and after the leading edge of the vertical synchronization signal. As is well known, a flat portion having a length of 27 μs exists before and after the leading edge of the vertical synchronization signal. If there is no ghost, this flat portion remains unchanged, while if there is a ghost, the ghost waveform of the leading edge of the vertical synchronization signal appears in this flat portion. Therefore, after the television signals (vertical blanking periods) received by the respective antennas have been stored in the memories A, B, C, and D (107 to 110) during the four-field period, the vertical signals that are the main signals A differentiating circuit is used to determine the peak value of the synchronization signal leading edge and its ghost signal.
The read outputs of the memories 107 to 110 are differentiated by 111 to 114. This is indicated by a mark in FIG. 4 (b). In the same period, the outputs of the differentiating circuits 111 to 114 are further input to the maximum value / gradual value detecting circuits 115 to 118, and the maximum value representing the main signal and the next maximum value representing the level of the maximum ghost are calculated. In the following, the ratio is obtained by the division circuits 119 to 122. The smaller this ratio is, the smaller the ratio of the ghost to the main signal is.
The minimum value detection circuit 123 obtains the minimum value among the outputs of the division circuits 119 to 122. After that, the antenna selection signal generating circuit 124 is controlled in accordance with this, and the antenna selection switch is switched to select an optimum antenna. As a result, as shown in FIG. 4C, for example, even if the antenna A is selected during the first to third fields (video signal period), the antenna is switched to the antenna C from the fourth field, and You can receive less video.

In this embodiment, a signal having a small ratio between the main signal and the ghost signal is selected. However, the condition that the main signal is large is further added to this method, and the selection criterion that the electric field is strong and the ghost is small is further increased. It can also be strengthened.

FIG. 2 is a diagram showing a detection method and a correction method of a signal time lag before and after antenna switching in the embodiment of the present invention. In the figure, 201 is a variable delay line 202 is a delay line, 203
Is a switch group, 204 is a D / A converter, 205 to 208 are registers A, B, C, D and 209 are switches, 210 and 211 are registers, 21
2 is a subtraction circuit, and 213 is a switch selection circuit.

The operation will be described below. Register A, B, C, D (205 ~
208) are maximum value / next maximum value detection circuits A, B, C, D (115
To 118), and stores the number of read clocks until a maximum value is obtained based on the field reference signal. The switch 209 operates to send the contents of the registers A, B, C, and D corresponding to the antenna selected by the output of the antenna selection signal 124 to the register 210. For example, already the 4th
As described with reference to FIG.
When the antenna is switched to the antenna C, the register 210 initially stores the number of clocks from the field reference signal to the leading edge of the vertical synchronization signal when the antenna A is selected. Next, when it is determined that the antenna C is optimal, the contents of the register 210 are sent to the register 211, and the register 210 stores the number of clocks from the field reference signal to the leading edge of the vertical synchronization signal when the antenna C is selected. Remembered. The subtraction circuit 212 calculates the difference between the contents of the registers 210 and 211. If this difference is 0, it means that there is no signal time lag even when the antenna is switched, but if it is not 0, there is a signal time lag. Therefore, the switch selection circuit 213 selects an appropriate switch from the switch group 203 in the variable delay line 201 in accordance with the deviation, and sends the signal to the D / A converter 204. The D / A converter 204 is a variable delay line 20.
The output of 1 is converted to an analog signal and sent to the subsequent signal processing circuit and synchronization circuit 125. With respect to the variable delay line 201, if a normal output is taken out from an intermediate switch, the delay amount can be controlled in both directions of increasing and decreasing. By such a method, a signal time shift when the antenna is switched can be corrected, and therefore, a signal having a constant phase is always obtained at the output of the D / A converter 204.

FIG. 3 is a circuit diagram of an embodiment of the present invention.
It is a figure which shows 5. In the figure, 301 is a sync separation circuit,
302 is a burst gate generation circuit, 303 is a switch, 304 is an AND circuit, 305 and 312 are phase comparison circuits, 306 and 311 are low pass filters (hereinafter abbreviated as LPF), 307 and 310 are voltage controlled oscillators, 308 and 309 are frequency dividing circuits, and 313 is LPF, 314 is an AND circuit, 315 is an OR circuit, 316 is an inverter, and 317 is a frequency dividing circuit.

The operation will be described below. Sync separation circuit 301, phase comparison circuit 312, LPF 311, voltage controlled oscillator 310, frequency divider 3
09 constitutes a horizontal AFC circuit. A synchronization signal is extracted from the output signal of the D / A converter 204, and a PLL circuit is configured based on the synchronization signal to obtain a stable reproduction synchronization signal at the output of the frequency dividing circuit 309. The burst gate generation circuit 302 includes a synchronization separation circuit 301
, A burst gate pulse is generated, and this is ANDed with a reproduction synchronization signal by an AND circuit 304. The output of the AND circuit 304 controls the switch 303 and sends only the color burst signal to the phase comparison circuit 305. Phase comparator 305, LPF 306, voltage controlled oscillator 307, frequency divider 308
Constitutes a PLL circuit for generating a clock signal of, for example, 4f _SC (f _SC is a color subcarrier frequency). In this case, the output of the voltage controlled oscillator 307 becomes a clock signal,
The frequency dividing circuit 308 is a frequency dividing circuit.

Next, generation of a field reference signal, which is an important operation in the present embodiment, will be described. The frequency dividing circuit 317 divides the frequency of the clock signal of 4f _SC by (455 × 525), and generates a frequency-divided output having, for example, one clock width. According to the NTSC standard, between f _SC , f _H (horizontal frequency) and f _V (vertical frequency) Since the following relationship exists, the divided output matches the vertical frequency. Therefore, when a vertical synchronizing signal separated in synchronization by the AND circuit 314, the OR circuit 315, and the inverter 316 is input, and the output of the frequency dividing circuit 317 exists, the frequency dividing circuit 317 is reset by the frequency dividing output. Then, when the vertical synchronizing signal is input, if there is no frequency-divided output, the operation is performed so as to reset with the vertical synchronizing signal. In this manner, when the channel is switched, the reset is performed by the input vertical synchronizing signal, and thereafter, the reset is continued by the divided output, so that a stable field reference signal can be obtained even if the vertical synchronizing signal is occasionally lost. . If the count data of the frequency divider 317 is decoded by a predetermined number, a field reference signal having an arbitrary phase can be obtained.

[Effects of the Invention] As described above, according to the present invention, it is possible to select an antenna having a small ghost and a strong electric field strength, so that good reception is possible. On the other hand, the time lag of the signal generated by switching the antenna is automatically detected and corrected, so that the synchronization disturbance generated at the time of switching can be greatly reduced.

As described above, it is possible to provide an in-vehicle television receiver that can receive good images even in an area where many buildings exist in the center of a city and many ghosts occur.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an antenna selection method of an in-vehicle television receiver according to the present invention, FIG. 2 is a block diagram showing a detection method and a correction method of a signal time lag before and after antenna switching, and FIG. FIG. 4 is a timing chart showing operation timing, and FIG. 5 is a block diagram of a conventional in-vehicle television receiver. 101… Antenna, 107-110 …… Memory, 115-118…
Maximum value / next maximum value detection circuit, 119 to 122 …… Division circuit, 123
…… Minimum value detection circuit, 124 …… Antenna selection signal generation circuit, 125 …… Synchronization circuit, 201 …… Variable delay line, 205-208…
... Register, 210, 211 ... Register, 212 ... Subtraction circuit,
213 …… Switch selection circuit.

 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshiyuki Kurita 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Inside the Home Appliances Research Laboratory, Hitachi, Ltd. (56) Reference JP-A-57-212880 (JP, A)

Claims (2)

(57) [Claims] 1. A plurality of television receiving antennas, a memory for storing a signal during a vertical blanking period received and detected by each antenna, and a desired signal level and a ghost signal for each antenna by reading the memory. A level determination circuit for determining the level of the level, and an antenna selection switch that operates based on the output of the level determination circuit, and the ghost signal having the magnitude of the desired signal level as a denominator based on the output of the level determination circuit. An in-vehicle television receiver, wherein a ratio to a level is taken, and an antenna having a smaller ratio is selected by the antenna selection switch and received. 2. A plurality of television receiving antennas, a memory for storing a signal in a vertical blanking period received and detected by each antenna, and a desired signal level and a ghost signal for each antenna by reading the memory. A level determination circuit for determining the level magnitude, and a ratio between the ghost signal level and the magnitude of the desired signal level is taken as a denominator based on the output of the level determination circuit, and an antenna having a smaller ratio is selected and switched. An antenna selection switch, a variable delay line that delays a signal from the antenna selected by the antenna selection switch, and a measurement unit that measures a time lag between signals before and after antenna switching using an output from the memory. Controlling the amount of delay of the variable delay line so as to correct the time lag according to the output of the measuring means. , Automotive television receiver, characterized in that it has to receive an output from the variable delay line.