JPH03245679A - Gate method for horizontal synchronizing signal - Google Patents

Abstract

PURPOSE:To synchronize a gate pulse quickly with a synchronizing signal even in the presence of discontinuity in the horizontal synchronizing signal by resetting a counter with the horizontal synchronizing signal only. CONSTITUTION:A counter section 28 is reset by only a reset signal detecting an edge of a synchronizing signal at an edge detection circuit 36. Then even in the presence of discontinuity of a synchronizing signal and even when a gate pulse G and a synchronizing signal (d) are asynchronous, the width of the gate pulse G is made spread and till the synchronizing signal (d) passes the gate circuit 14, the gete circuit 14 is kept open. When the synchronizing signal (d) passes the gate circuit 14, the edge detection circuit 36 outputs a reset signal (h) to reset the counter section 28 and the gate pulse G and the synchronizing signal (d) are made synchronizing immediately. Thus, lots of synchronizing signals are not in missing in the gate circuit 14 at the discontinuous phase of the horizontal synchronizing signal but delivered to a post-stage horizontal AFC circuit 16 and the tracking is improved.

Description

[Detailed description of the invention] (b) Industrial application field The present invention relates to a horizontal synchronization signal gating method.

(b) Conventional technology FIG. 3 shows an outline of a horizontal synchronization circuit of a television receiver, VTR, etc. The video signal applied to the input terminal (10) is input to the synchronization separation circuit (12) and is converted into a synchronization signal (C, 5).
YNC) is output. This synchronization signal is applied to the gate circuit (1
4), the noise is removed and the well-known horizontal AFC circuit (1
6). (18) (20) (22) (24)
are a phase comparator, a low-pass filter, a voltage variable oscillator, and a frequency divider, respectively.

The gate circuit (14) is manufactured by Japanese Patent Publication No. 61-41.193.
Although this is well known, it will be explained below just in case. This gate circuit (14) removes signals that become noise for the horizontal AFC circuit, such as equivalent pulses included in the synchronization signal.

For example, when a video signal including a macrovision signal for preventing dubbing of a VTR as shown in FIGS. 4 and 5(v) is input, the sync separation circuit (12) as shown in FIG. 5(d) Output the synchronization signal (C, 5sync>, divide the frequency by u(24,)
outputs the gate pulse shown in FIG. 5(G). Therefore, the gate circuit (14) outputs only the horizontal synchronization signal of the horizontal synchronization period as shown in FIG. 5(e). Horizontal AFC circuit (16
) works fine.

Next, the operation of this gate circuit (14) will be specifically explained with reference to FIGS. 6 and 7.

In FIG. 6, (14) is a gate circuit consisting of an AND circuit. (26) is a gate pulse generation circuit that generates a gate pulse (G). (28) is voltage variable oscillation! This is a counter unit that counts the reference clock signal from (22). (30), (32), and (34') are decoders that output signals when this counter section (28) counts a predetermined number of reference clocks. Note that these count values correspond to the periods T1, T2, and T3 in FIG. 7, respectively. (26) is a gate pulse (
This is a gate pulse generation circuit that outputs G). (36)
is an edge detection circuit, and this circuit (36) detects the rising edge of the horizontal synchronization signal when it passes through the gate circuit (14) and generates a reset signal (h) that resets the counter section (28). Output. In addition, the decoder (34) has a counter section (28) with a predetermined number (FIG. 7C).
), and outputs a reset signal. This signal (C) is input to the counter section (28) via the adder (38).

Since the above circuit is self-reset by the decoder (34), even if one synchronization signal is lost as shown in Figure 7, the output of this gate circuit (14) will be as shown in Figure 7e, and this No inconvenience occurs even if only one synchronizing signal is missing. Therefore, the horizontal AFC circuit (16) operates well even when the synchronization signal is accustomed to be lost, such as when receiving a weak electric field.

(c) Problems to be Solved by the Invention As described above, the above circuit works well against synchronization signal loss, but this occurs when switching heads on a VTR or track jumps during special playback on a video disc player, etc. A defect occurs when the phase of the horizontal synchronization signal is discontinuous.

This will be explained with reference to FIGS. 6 and 8.

In other words, discontinuity of the horizontal synchronizing signal occurs between synchronizing signals A and I and K and K in FIG. 8 due to the above-mentioned reasons. In other words, from this discontinuous time, the gate pulse G and the input synchronizing signal d
is in an asynchronous state, and the input synchronous signal of Fig. 8,
The signals ENG, KI, RI, KE, and KO are cut by the gate circuit (14) and are not output to the horizontal AFC circuit (16). Then, in order for the synchronization signal to be outputted again from the gate circuit (14),
Several H periods (H is the horizontal scanning period) are required. This number H
Since the synchronizing signal (e) is naturally not supplied to the horizontal AFC circuit (16) during this period, horizontal AF is started only after this number of H periods.
The C circuit (]6) starts tracking the synchronization signal.

In this way, in the conventional circuit, when phase discontinuity occurs in the horizontal synchronization signal as shown in FIG. 8, the horizontal AFC circuit (16)
takes time to follow the synchronization signal.

(d) Means for Solving the Problems The horizontal synchronizing signal gating method of the present invention uses a counter (28) for counting the reference signal in order to remove noise components from the horizontal synchronizing signal (d) separated and extracted from the video signal. A gate pulse (G) with a timing and width that allows the horizontal synchronizing signal (d) to pass is created by counting the output of the horizontal synchronizing signal (cl), and using this gate pulse (G),
)-, and the counter (28) is reset only by this gated horizontal synchronizing signal (e).

(E) Function In the present invention, the counter (28) is controlled by only the horizontal synchronizing signal.
is reset, so the count period of this counter is
Since it quickly matches the horizontal synchronizing signal, the gate pulse (G) created by this count output is immediately synchronized with the horizontal synchronizing signal.

(f) Embodiment An embodiment of the present invention will be described with reference to FIGS. 1 and 2. In addition, in Fig. 1, the same parts as Fig. 6 have the same parts.
- are given symbols and explanations are omitted.

(40) is a self-reset prohibition circuit, which is in an open state. In other words, the output of the decoder (34) is turned off so that the counter section (28) is reset only by the reset signal (h) from the work/judge detection circuit (36).

The operation of the circuit shown in FIG. 1 will be explained with reference to FIG.

Suppose that a discontinuity occurs in the horizontal synchronizing signal between synchronizing signals A and I and between F and K in FIG. 2D. The edge of the synchronization signal is detected by the edge detection circuit (36) and the reset signal is used alone.
The counter section (28) is reset. Therefore, discontinuity occurs in the synchronization signal, and the gate pulse (G) and the synchronization signal (
Even if d) becomes asynchronous.

The gate pulse (G) widens its width and becomes the synchronizing signal ((1
) is maintained in the open state until the passage of the gate circuit (14). Then, the synchronization signal (d) is sent to the gate circuit (14)
, the edge detection circuit (36) outputs a reset signal (
h) to reset the counter section (28) and immediately bring the gate pulse (G) and synchronization signal (d) into a synchronized state. Therefore, in the subsequent horizontal AFC circuit (16), a large amount of the synchronization signal is not lost in the gate circuit (14) when the phase of the horizontal synchronization signal is discontinuous, and tracking performance is improved.

In the above embodiment, the self-reset prohibition circuit (40) is opened, but it may be opened or closed depending on the situation.

For example, when a video signal is input from a VTR or laser disc player, the self-reset prohibition circuit (40) is naturally opened to prohibit self-reset. In this way, as described above, even if discontinuity occurs in the phase of the horizontal synchronization signal, the horizontal AFC circuit (16) is quickly stabilized. Also, V
Synchronization signal loss rarely occurs in the reproduction signal of the TR and the reproduction signal from the laser disc player.

Furthermore, when a broadcast reception video signal is input from the built-in tuner, the self-reset prohibition circuit (40) is closed and the operation is performed in the same manner as shown in FIG. Therefore, even if the synchronization signal is lost when receiving a weak electric field, it operates stably.

(G) Effects of the Invention According to the present invention, even if there is discontinuity in the horizontal synchronization signal, the gate pulse can be quickly synchronized with the synchronization signal.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention. FIG. 2 is a diagram showing the waveforms of each part. Fig. 3 is a diagram showing the horizontal synchronization circuit, Fig. 4 is a diagram showing the macrovision signal, Fig. 5 is a diagram for explaining the operation of the third step, Figs.
FIG. 8 is a diagram for explaining the gate circuit. (28)...Counter (counter section), (14)...
-Gate circuit, (G)...Gate pulse, (dXe)...Synchronization signal, (h)...Reset signal.

Claims (1)

[Claims] (1) Horizontal synchronization signal (d) separated and extracted from the video signal
In order to further remove noise components, a gate pulse (G) with a timing and width that allows the horizontal synchronization signal (d) to pass is created by counting the output of a counter (28) that counts the reference signal, and this gate pulse ( G) A method of gating a horizontal synchronizing signal, in which the horizontal synchronizing signal (d) is gated and the counter (28) is reset by only the gated horizontal synchronizing signal (e).