JPS6284277U - - Google Patents
Info
- Publication number
- JPS6284277U JPS6284277U JP17315185U JP17315185U JPS6284277U JP S6284277 U JPS6284277 U JP S6284277U JP 17315185 U JP17315185 U JP 17315185U JP 17315185 U JP17315185 U JP 17315185U JP S6284277 U JPS6284277 U JP S6284277U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- frequency
- synchronization signal
- horizontal synchronization
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 230000010355 oscillation Effects 0.000 claims description 3
- 238000000926 separation method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 2
Landscapes
- Synchronizing For Television (AREA)
- Television Signal Processing For Recording (AREA)
Description
第1図及び第2図は本考案に係り、第1図は一
実施例の水平同期回路のブロツク図、第2図は他
の実施例の水平同期回路のブロツク図である。第
3図は従来の水平同期回路のブロツク図である。
1…映像信号入力端子、2…水平同期分離回路
、5…位相検波回路、6…電圧制御発振回路、7
…分周回路、8…同期信号検出回路、9…ゲート
回路。
1 and 2 relate to the present invention; FIG. 1 is a block diagram of a horizontal synchronous circuit according to one embodiment, and FIG. 2 is a block diagram of a horizontal synchronous circuit according to another embodiment. FIG. 3 is a block diagram of a conventional horizontal synchronization circuit. DESCRIPTION OF SYMBOLS 1...Video signal input terminal, 2...Horizontal synchronization separation circuit, 5...Phase detection circuit, 6...Voltage controlled oscillation circuit, 7
...Frequency divider circuit, 8...Synchronization signal detection circuit, 9...Gate circuit.
Claims (1)
る水平同期分離回路と、一方の入力として上記水
平同期信号が、他方の入力として周波数が水平周
波数のn倍の信号を発振する電圧制御発振回路の
出力信号を受けて、その信号の周波数を1/n倍
に分周する分周回路の出力信号が夫々供給され、
この2つの入力信号の位相差に応じた誤差電圧に
より上記電圧制御発振回路を制御する位相検波回
路と、前記水平同期分離回路からの信号を受けて
、同期信号の有無を検出する同期信号検出回路と
から成り、前記同期信号検出回路が同期信号無と
判断した時は、電圧制御発振回路を制御中心周波
数で自走すべく構成することを特徴とした水平同
期回路。 A horizontal synchronization separation circuit that inputs a video signal and outputs its horizontal synchronization signal, and a voltage controlled oscillation circuit that oscillates the horizontal synchronization signal as one input and a signal whose frequency is n times the horizontal frequency as the other input. An output signal of a frequency dividing circuit that receives the output signal and divides the frequency of the signal by 1/n times is supplied, respectively;
A phase detection circuit that controls the voltage controlled oscillator circuit with an error voltage according to the phase difference between these two input signals, and a synchronization signal detection circuit that receives the signal from the horizontal synchronization separation circuit and detects the presence or absence of a synchronization signal. A horizontal synchronization circuit comprising: a voltage controlled oscillation circuit configured to run freely at a control center frequency when the synchronization signal detection circuit determines that there is no synchronization signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17315185U JPS6284277U (en) | 1985-11-11 | 1985-11-11 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17315185U JPS6284277U (en) | 1985-11-11 | 1985-11-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6284277U true JPS6284277U (en) | 1987-05-29 |
Family
ID=31110342
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17315185U Pending JPS6284277U (en) | 1985-11-11 | 1985-11-11 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6284277U (en) |
-
1985
- 1985-11-11 JP JP17315185U patent/JPS6284277U/ja active Pending