JPS63111067U - - Google Patents
Info
- Publication number
- JPS63111067U JPS63111067U JP260987U JP260987U JPS63111067U JP S63111067 U JPS63111067 U JP S63111067U JP 260987 U JP260987 U JP 260987U JP 260987 U JP260987 U JP 260987U JP S63111067 U JPS63111067 U JP S63111067U
- Authority
- JP
- Japan
- Prior art keywords
- synchronization signal
- horizontal synchronization
- circuit
- phase comparison
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000926 separation method Methods 0.000 claims description 3
- 239000002131 composite material Substances 0.000 claims 1
- 239000000284 extract Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Synchronizing For Television (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第１図は、本考案のＰＬＬ回路の概略構成を示
すブロツク図、第２図は本考案のＰＬＬ回路の一
実施例を示す回路図、第３図はその動作説明波形
図、第４図は従来のＰＬＬ回路を示す図、第５図
は可変容量ダイオードの特性を示す図、第６図、
第７図及び第８図はそれぞれ従来のＰＬＬ回路の
動作を説明するための波形図である。
２……映像入力端子、３……同期分離回路、８
……位相比較回路、５……電圧制御型発振回路、
１９……疑似水平同期信号供給回路。
FIG. 1 is a block diagram showing a schematic configuration of the PLL circuit of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the PLL circuit of the present invention, FIG. 3 is a waveform diagram explaining its operation, and FIG. A diagram showing a conventional PLL circuit, FIG. 5 is a diagram showing characteristics of a variable capacitance diode, and FIG.
FIGS. 7 and 8 are waveform diagrams for explaining the operation of the conventional PLL circuit, respectively. 2...Video input terminal, 3...Synchronization separation circuit, 8
... Phase comparison circuit, 5 ... Voltage controlled oscillation circuit,
19...Pseudo horizontal synchronization signal supply circuit.
Claims (1)
部同期信号を抽出する同期分離回路と、内部同期
信号を出力する電圧制御型発振器と、前記同期分
離回路から出力される外部水平同期信号と前記電
圧制御型発振器から出力される内部水平同期信号
との位相比較を行なう位相比較回路と、前記位相
比較回路の出力によつて前記電圧制御発振器を制
御し内部水平同期信号を外部水平同期信号に同期
せしめるようにしたＰＬＬ回路において、前記位
相比較回路の出力に基づいて外部水平同期信号の
欠落を検出すると、欠落した外部水平同期信号の
直後に疑似水平同期信号を挿入する疑似水平同期
信号供給回路を設けたことを特徴とするＰＬＬ回
路。 a synchronization separation circuit that extracts an external synchronization signal from a composite video signal supplied to a video input terminal; a voltage-controlled oscillator that outputs an internal synchronization signal; an external horizontal synchronization signal output from the synchronization separation circuit; and the voltage control circuit. a phase comparison circuit for performing a phase comparison with an internal horizontal synchronization signal outputted from a type oscillator; and a phase comparison circuit for controlling the voltage controlled oscillator using the output of the phase comparison circuit to synchronize the internal horizontal synchronization signal with the external horizontal synchronization signal. In the PLL circuit according to the present invention, a pseudo-horizontal synchronization signal supply circuit is provided which inserts a pseudo-horizontal synchronization signal immediately after the missing external horizontal synchronization signal when detecting a lack of the external horizontal synchronization signal based on the output of the phase comparison circuit. A PLL circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP260987U JPS63111067U (en) | 1987-01-12 | 1987-01-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP260987U JPS63111067U (en) | 1987-01-12 | 1987-01-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63111067U true JPS63111067U (en) | 1988-07-16 |
Family
ID=30781610
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP260987U Pending JPS63111067U (en) | 1987-01-12 | 1987-01-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63111067U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009171443A (en) * | 2008-01-18 | 2009-07-30 | Mitsubishi Electric Engineering Co Ltd | Digital pll circuit |
-
1987
- 1987-01-12 JP JP260987U patent/JPS63111067U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009171443A (en) * | 2008-01-18 | 2009-07-30 | Mitsubishi Electric Engineering Co Ltd | Digital pll circuit |
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