JPS62125029U - - Google Patents
Info
- Publication number
- JPS62125029U JPS62125029U JP1137386U JP1137386U JPS62125029U JP S62125029 U JPS62125029 U JP S62125029U JP 1137386 U JP1137386 U JP 1137386U JP 1137386 U JP1137386 U JP 1137386U JP S62125029 U JPS62125029 U JP S62125029U
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- oscillator
- synchronous
- sine wave
- synchronized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001360 synchronised effect Effects 0.000 claims description 11
- 238000003079 width control Methods 0.000 claims description 2
- 230000010355 oscillation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第1図は本考案の一実施例の回路構成図、第2
図は発振器の同期パルス幅/制限波周期に対する
同期引込時間、歪率の関係図、第3図ないし第5
図は従来例の説明図である。
1…同期式正弦波発振器、2…同期パルス、3
…同期式正弦波発振器出力、4…パルス幅制御回
路、41…同期調整パルス、5…位相弁別回路。
Figure 1 is a circuit configuration diagram of an embodiment of the present invention;
The figure shows the relationship between the synchronization pulse width/limited wave period of the oscillator, the synchronization pull-in time, and the distortion factor, Figures 3 to 5.
The figure is an explanatory diagram of a conventional example. 1... Synchronous sine wave oscillator, 2... Synchronous pulse, 3
... Synchronous sine wave oscillator output, 4... Pulse width control circuit, 41... Synchronous adjustment pulse, 5... Phase discrimination circuit.
Claims (1)
パルスと、前記発振器の出力をそれぞれ導入し、
両者の位相を比較し位相差を弁別する位相弁別回
路と、 その位相弁別回路からの位相を弁別した信号と
、前記同期パルスを受け入れ、この同期パルスに
前記発振器の出力が同期していないときは前記位
相差に対応して同期パルスの幅を広くし、同期し
ているときは幅を狭くした同期調整パルスを同期
式正弦波発振器へ与えるパルス幅制御回路と、 を具備することを特徴とする同期式正弦波発振器
の同期引込装置。[Claims for Utility Model Registration] Introducing a free-running synchronous sine wave oscillator, a synchronous pulse having the same period as the oscillation period of this oscillator, and the output of the oscillator, respectively,
A phase discrimination circuit that compares the phases of the two and discriminates the phase difference, and receives the phase-discriminated signal from the phase discrimination circuit and the synchronization pulse, and when the output of the oscillator is not synchronized with the synchronization pulse. A pulse width control circuit that widens the width of a synchronization pulse in response to the phase difference and provides a synchronization adjustment pulse with a narrowed width when synchronized to the synchronized sine wave oscillator. Synchronous sine wave oscillator synchronous pull-in device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1137386U JPS62125029U (en) | 1986-01-29 | 1986-01-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1137386U JPS62125029U (en) | 1986-01-29 | 1986-01-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62125029U true JPS62125029U (en) | 1987-08-08 |
Family
ID=30798528
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1137386U Pending JPS62125029U (en) | 1986-01-29 | 1986-01-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62125029U (en) |
-
1986
- 1986-01-29 JP JP1137386U patent/JPS62125029U/ja active Pending