JPS59155173A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain an MIS type field-effect transistor easily with excellent reproducibility by using an electrode layer as a gate electrode, impurity introducing regions as a source region and a collector region respectively and a conductive layer as a source electrode and a drain electrode. CONSTITUTION:A layer 4 for forming a stepped difference with an inclined plane 3 is formed on the main surface 2 of a semiconductor substrate 1. A conductive layer 6, which is extended while coating the layer 4 for forming the stepped difference and has an inclined plane opposite to the inclined end surface 3 of the layer 4 for forming the stepped difference, is formed on the main surface 2 of the semiconductor substrate 1, and an electrode layer 7 is formed from the conductive layer 6 through directional etching treatment from the direction approximately vertical to the main surface 2 of the semiconductor substrate 2 to the conductive layer 6. Impurity introducing regions 12, 13 can be formed at asymmetric positions holding the electrode layer 7 on a viewing from the upper section of the main surface 2 of the substrate 1 through the implantation treatment of impurity ions 8 while using the electrode layer 7 as a mask.

Description

Detailed Description of the Invention The present invention provides an electrode layer formed on the main surface of a semiconductor substrate, and an electrode layer formed on the main surface of the semiconductor substrate on which the electrode layer is formed. The present invention relates to a method for manufacturing a semiconductor device having a structure in which first and second impurity-introduced regions are formed at both positions sandwiching an electrode layer formed in the semiconductor device.

As a semiconductor device having the above-described configuration, there is a field effect transistor in which the electrode layer is a gate electrode, and the first and second impurity-introduced regions are a source region and a drain region, respectively.

In this case, the field effect transistor has a structure in which the semiconductor substrate has a semiconductor substrate main body and an insulating film formed on the main surface thereof, and an electrode layer is formed on the insulating crotch. A MIS type field effect transistor is configured using this insulating film as a gate insulating film.

In addition, in a field effect transistor, when the semiconductor substrate has a semiconductor substrate body and an electrode layer is formed on the main surface of the semiconductor substrate body so as to form a Schottky junction therebetween, the MES type electric field It constitutes an effect transistor.

Further, in a semiconductor device having the above-described configuration, the first and second impurity-introduced regions are respectively a collector region and an emitter region, the region between the collector region and the emitter region of the semiconductor substrate is a base region, and the electrode layer is a base region. There is a bipolar transistor that does this. In this case,
The semiconductor substrate has a semiconductor substrate body, and an electrode layer is formed on the main surface of the semiconductor substrate body in ohmic contact therewith.

In the semiconductor device having the above-mentioned configuration, it is
Whether it is the above-mentioned field effect transistor or a bipolar transistor, generally the first and second electrode layers are
It is desirable that the length in the direction connecting the impurity introduced regions is as short as possible.

One reason for this is that if the semiconductor device is a field effect transistor, if the length of the electrode layer described above is shortened, the gate electrode length will be shortened, and therefore signals with higher frequencies can be handled. It is. Furthermore, if the semiconductor device is a bipolar transistor, if the length of the electrode layer described above is shortened, the length of the base electrode will be shortened, and the length between the collector region and the emitter region of the base region will be shortened accordingly. This is because it is possible to handle signals having a higher frequency in the same way as when the semiconductor device is a field effect transistor.

Furthermore, in a semiconductor device having the above-mentioned configuration, whether it is the above-mentioned field effect transistor or a bipolar transistor, generally, within the semiconductor substrate,
When viewed on the main surface, it is desirable that the first and second impurity-introduced regions, which are formed at both positions sandwiching the electrode layer, are formed at positions asymmetrical with respect to the electrode layer.

One of the reasons for this is that the semiconductor device is a field effect transistor, in which the gate electrode is used as an input electrode, the train electrode attached to the drain region is used as the output electrode, and the source electrode attached to the source region is used as a common electrode. In this case, the so-called short channel effect can be avoided, and the input impedance seen between the gate electrode and the source electrode can be prevented from decreasing due to the mirror effect of the capacitance between the gate electrode and the drain electrode. This is because it can be avoided.

Further, the semiconductor device is a bipolar transistor,
When the base electrode is used as an input electrode, the collector electrode attached to the collector region is used as an output electrode, and the emitter electrode attached to the emitter region is used as a common electrode, the capacitance between the base electrode and the collector electrode is reduced. This is because it is possible to improve the breakdown voltage between the base electrode and the collector electrode.

By the way, in the manufacturing method of a semiconductor device having the above-described configuration, conventionally, the electrode layer has been generally formed by photolithography using a mask.

However, when using such a semiconductor device manufacturing method, it is extremely difficult to form the electrode layer to a short length on the order of submicrons with good reproducibility.
As mentioned above, although it is desired to form a short length, it has the disadvantage that this cannot be fully satisfied.

Furthermore, in the conventional method for manufacturing a semiconductor device having the above-described structure, the first and second impurity-introduced regions, which are formed at asymmetric positions with respect to the electrode layer, are usually formed in the following manner. It was.

That is, as described above, an electrode layer is formed with a T-shaped cross section on the main surface of the semiconductor substrate by photolithography, or an electrode layer is formed on the main surface of the semiconductor substrate by photolithography, and the electrode layer is formed on the main surface of the semiconductor substrate by photolithography. A layer protruding outward from both sides of the electrode layer is formed on the electrode layer 411m by a photolithographic eye method, thereby forming a layer having a T-shaped cross section on the main surface of the semiconductor substrate. First and second impurity-introduced regions are formed in the semiconductor substrate by implanting impurity ions into the semiconductor substrate from a direction oblique to the main surface of the semiconductor substrate using a layer having a T-shaped cross section as a mask. Form.

However, when using such a semiconductor device manufacturing method, in the process of implanting impurity ions into a semiconductor substrate from an oblique direction with respect to its main surface, the angle of the oblique direction is adjusted to a predetermined angle with good reproducibility. Therefore, it is difficult to set the asymmetrical positions of the first and second impurity-introduced regions with respect to the electrode layer to the planned positions with good reproducibility. Although it has the desired characteristics, it has the disadvantage that it cannot be easily manufactured.

Therefore, the present invention aims to propose a novel method for manufacturing a semiconductor device having the above-mentioned configuration without the above-mentioned drawbacks, which will become clear from the following description.

First, the method for manufacturing a semiconductor device according to the first invention of the present application is as follows.
Let's explain it with an example.

FIGS. 1A to 1I show an embodiment of a method for manufacturing a semiconductor device according to the first invention of the present application, as follows.

As shown in FIG. 1A, a semiconductor substrate 1 is prepared in advance.

This semiconductor substrate 1 includes, for example, an N-type semiconductor substrate body 1a made of, for example, Si, GaAs, etc., and an insulating film 1b made of 5i(h, Sf+0+, etc.) formed thereon.
It becomes.

As shown in FIG. 1B, on the main surface 2 of the semiconductor substrate 1, a step-forming layer 4 having an inclined end surface 3 that is inclined by an angle φ with respect to the main surface 2 is itself formed. is formed by a known method.

This step forming layer 4 is made of, for example, S t Or or S+IN4, which is resistant to subsequent directional etching treatment.

Next, on the main surface 2 of the semiconductor substrate 1, as shown in FIG. conductive layer 6 having
The thickness D2 on the inclined end surface 3 of the step forming layer 4 has a relationship of D2≧D and CO3φ with respect to the thickness Dl on the main surface 2 of the semiconductor substrate 1 and the upper surface of the step forming layer 4. It is formed to the desired thickness by, for example, a plasma CVD method, a thermal CVD method, or the like.

Next, the conductive layer 6 is subjected to a directional etching process using a reactive etching solution, an ion milling method, etc. from a direction substantially perpendicular to the main surface 2 of the semiconductor substrate 1.
The main surface 2 of the semiconductor substrate 1 of the conductive layer 6 and the step forming layer 4
The area on the top surface of is removed by doing
As shown in the first diagram, an electrode layer 7 is formed extending downward from the conductive layer 6 only on the inclined end surface 3 of the step forming layer 4.

Next, as shown in FIG. 1E, the step forming layer 4 is removed from the main surface 2 of the semiconductor substrate 1 using, for example, an etching solution.

Next, as shown in FIG. 1F, for the semiconductor substrate 1,
By implanting P-type impurity ions 8 from a direction substantially perpendicular to the main surface 2 of the semiconductor substrate 1 using the electrode layer 7 as a mask, the main surface 2 of the semiconductor substrate 1 is implanted into the semiconductor substrate body 1a of the semiconductor substrate 1. Viewed from above, at both positions sandwiching the electrode layer 7,
Impurity ion implantation regions 9 and 10 are formed, respectively.

Next, as shown in FIG.
The surface protection film 11 made of an insulating material such as Sf+N4 is coated with CV
D method 1. It is formed using a sputtering method or the like.

Next, the impurity ion implantation regions 9 and 10 are activated by annealing treatment using laser, electron beam, heat, etc., as shown in FIG. P-type impurity introduced regions 12 and 13 are formed.

Next, as shown in FIG. 1, windows 14 and 15 are formed through the surface protective film 11 and the insulating film 1b of the semiconductor substrate 1 to allow the impurity introduced regions 12 and 13 to be exposed to the outside. , windows 14 and 15 are formed on the surface protection film 11.
Conductive layers 16 and 17 are formed in ohmic contact with the impurity introduced regions 12 and 13 through the conductive layers 12 and 13 to obtain the intended semiconductor device.

The above is the first embodiment of the method for manufacturing a semiconductor device according to the first invention of the present application.

In the semiconductor device shown in FIG. 1 obtained by such a manufacturing method, the electrode layer 7 is used as the gate electrode impurity introduced regions 12 and 13 as the source region and the collector region, respectively, and the electrode of the insulating film 1b constituting the semiconductor substrate 1. The region under H7 is a gate insulating film, the conductive layer 16 is a source electrode, and the conductive layer 17 is
It is clear that an MIS type field effect transistor is constructed with the drain electrode being the drain electrode.

According to the method for manufacturing a semiconductor device according to the first invention of the present application described above in FIGS. Forming the electrode layer 7 on the main surface 2 of the semiconductor substrate 1, forming a step forming layer 4 having an inclined end surface 3;
Next, on the main surface 2 of the semiconductor substrate 1, a conductive layer 6 is formed which extends to cover the step forming layer 4 and has an inclined surface opposing the inclined end surface 3 of the step forming layer 4. By performing a directional etching process on the conductive layer 6 from a direction substantially perpendicular to the main surface 2 of the semiconductor substrate 1,
It is formed from the conductive layer 6, and is not formed by photolithography using a mask, which is the conventional method for manufacturing semiconductor devices.

Further, the length of the electrode layer 7 (the length of the electrode layer 7 in contact with the main surface 2 of the semiconductor substrate 1) is extended onto the main surface 2 of the semiconductor substrate 1, covering the step forming layer 4. It is determined by the length of the conductive layer 6 to be formed, and if its thickness is made small, its length can be shortened accordingly.

Therefore, according to the method for manufacturing a semiconductor device according to the first invention of the present application shown in FIGS. Therefore, a MIS field effect transistor having a short gate electrode length and capable of handling signals having a sufficiently high frequency can be manufactured easily and with good reproducibility.

Further, according to the method for manufacturing a semiconductor device according to the first invention of the present application described above with reference to FIGS. After forming the step forming layer 4, the step forming layer 4 is removed from the main surface 2 of the semiconductor substrate 1, and then the step forming layer 4 is removed from the main surface 2 of the semiconductor substrate 1 using the electrode layer 7 as a mask. Since the impurity ions 8 are implanted in the semiconductor substrate body 1a of the semiconductor substrate 1 by implanting the impurity ions 8 from a substantially vertical direction, the impurity-introduced regions 12 and 13 are Therefore, the electrode layer 7 can be formed at an asymmetric position with the electrode layer 7 in between.

Further, since the impurity introduced regions 12 and 13 are formed in this manner, it is easy to position the impurity introduced regions 12 and 13 at the planned positions with good reproducibility.

Therefore, according to the method for manufacturing a semiconductor device according to the first invention of the present application described in FIGS. The present invention is characterized in that a MIS field effect transistor having high input impedance and excellent characteristics can be manufactured easily and with good reproducibility.

Next, a method for manufacturing a semiconductor device according to the second invention of the present application,
Let's explain it with an example.

FIG. 2 A-J shows a first embodiment of a method for manufacturing a semiconductor device according to the second invention of the present application, and corresponding parts to those in FIG. 1 A-1 are given the same reference numerals and detailed explanations are given. Omitted.

In the first embodiment of the method for manufacturing a semiconductor device according to the second invention of the present application, as shown in FIGS.
In the first embodiment of the method for manufacturing a semiconductor device according to the first invention of the present application described above in Section 1, the steps up to FIG. The same process is used except that the semiconductor substrate body 1a of the semiconductor substrate 1 is formed instead of the semiconductor substrate body 1a, and the electrode layer 7 is formed on the main surface 2 of the semiconductor substrate 1. A configuration is obtained in which impurity ion implantation regions 9 and 10 are formed at both positions sandwiching the electrode layer 7, respectively, when viewed on the main surface 2.

Next, the electrode layer 7 is subjected to a directional etching process using a reactive etching method, an ion milling method, etc. from a direction substantially perpendicular to the principal surface 2 of the semiconductor substrate 1, as shown in FIG. As shown in G, an electrode layer 37 is formed by removing a required thickness of the side surface of the electrode layer 7 that is not in the shadow when viewed from the direction in which the directional etching process is performed.

Next, as shown in FIG. 2H, a similar surface protective film 11 is formed by the same method as described above in FIG. 1G.

Next, as shown in FIG. 2I, the same impurity introduced regions 12 and 13 as described above in FIG. 1H are formed by the same annealing process as described above in FIG. 1H.

Next, as shown in FIG. 2 J, a window 1 through which the impurity-introduced regions 12 and 13 are exposed to the outside in the same manner as described above in FIG.
4 and 15 are formed, and then windows 1 are formed on the surface protection film 11.
Conductive layers 16 and 17 are formed in ohmic contact with impurity introduced regions 12 and 13 through layers 4 and 15 to obtain the intended semiconductor device.

In this case, the electrode layer 37 is attached to the semiconductor substrate body 1a of the semiconductor substrate 1 so as to form a Schottky junction.

The above is an embodiment of the method for manufacturing a semiconductor device according to the second invention of the present application.

In the semiconductor device shown in FIG. 2J obtained by such a manufacturing method, the electrode layer 37 is used as a gate electrode, and the impurity introduced region 12 is used as a gate electrode.
and 13 are a source region and a drain region, respectively, and an electrode layer 3 of the semiconductor substrate body 1a constituting the semiconductor substrate 1.
It is clear that a MES type field effect transistor is constructed in which the region under 7 serves as a channel region, and the conductive layers 16 and 17 serve as a source electrode and a drain electrode, respectively.

The manufacturing method of the semiconductor device according to the second invention of the present application described above in FIGS. 3A to 3J, which manufactures a semiconductor device constituting such an MES type field effect transistor, is shown in FIGS. 1A to I.
In the method for manufacturing a semiconductor device according to the first invention of the present application described above, an impurity ion implantation region 9 is formed by implanting impurity ions 8 using the electrode layer 7 of FIG. 1F as a mask.
and 10, and the surface protective film 11 of FIG.
(As shown in FIG. 2F, a step of forming an electrode layer 37 that is not connected to the impurity ion implantation region 9 from the electrode layer 7 is inserted. Except for this, the steps are similar to those of the method for manufacturing the semiconductor device according to the first invention of the present application described above with reference to FIGS.

Therefore, although a detailed explanation is omitted, in the case of the manufacturing method of the semiconductor device according to the second invention of the present application described above in FIGS. 2 A to J, the semiconductor device according to the first invention of the present application described above in FIGS. It has the same excellent characteristics as the manufacturing method of the device.

Next, an embodiment of a method for manufacturing a semiconductor device according to the third invention of the present application will be described with reference to FIGS. 3A to 3K.

As shown in FIG. 3A, a semiconductor substrate 1 consisting of a semiconductor substrate 1a and an insulating film 1b similar to that described above in FIG. 1A is prepared in advance.

Then, as shown in FIG. 3B, a step forming layer 4 having a similar inclined end surface 3 is formed on the main surface 2 of the semiconductor substrate 1 by the same method as described above in FIG. 1B. Form.

Next, on the main surface 2 of the semiconductor substrate 1, as shown in FIG. The conductive layer 26 with the amorphous 5
It is formed of an amorphous semiconductor such as iGe-B.

Next, as shown in the third diagram, a conductive layer 26' having a slope 25' opposite to the slope 25 of the conductive layer 26 is placed on the conductive layer 26. According to the case of the conductive layer 6 described above in FIG. For example, plasma CVD method, thermal carbon
It is formed of a metal such as MO or A1 by a VD method or the like, so that it extends over the main surface 2 of the semiconductor substrate 1 to cover the step forming layer 4, and the inclined end surface of the step forming layer 4 is formed. conductive layer 2 having an inclined surface 25' opposite to 3;
A conductive layer 6 consisting of 6 and 26' is formed and covered.

Next, the conductive layer 6 is subjected to a directional etching process from a direction substantially perpendicular to the principal surface 2 of the semiconductor substrate 1 in the same manner as described above in connection with the first drawing, thereby etching the conductive layer 6 as shown in FIG. 3E.
As shown, the conductive layer 26 constituting the conductive layer 6
From the conductive layer 26 forming the conductive layer 6, an electrode layer 27' is formed extending only on the inclined surface 25 of the conductive layer 26, as shown in FIG. 3F. As shown, the electrode layer 27 extends only on the inclined end surface 3 of the step forming layer 4.
Therefore, the electrode R consisting of the electrode layers 27 and 27' extends only on the inclined end surface 3 of the step forming layer 4.
form 7.

Next, as shown in FIG. 3G, the step forming layer 4 is removed from the main surface 2 of the semiconductor substrate 1 in the same manner as described above in FIG. 1E.

Next, as shown in FIG. 3H, the semiconductor substrate is
Impurity ion implantation regions 9 and 10 similar to those described above in FIG. 1F are formed in the semiconductor substrate body 1a.

Next, as shown in FIG. 3, a similar surface protection film 11 is formed by the same method as described above in FIG. 1G.

Next, as shown in FIG. 3J, impurity introduced regions 12 and 13 similar to those described above in FIG. 1 are formed by the same annealing process as described above in FIG. 1H.

Next, as shown in FIG. 3K, windows 14 and 15 that expose the impurity introduced regions 12 and 13 to the outside are formed in the same manner as described in FIG. Next, conductive layers 16 and 17 are formed in ohmic contact with impurity introduced regions 12 and 13 through windows 14 and 15 to obtain the intended semiconductor device.

The above is an embodiment of the method for manufacturing a semiconductor device according to the third invention of the present application.

In the semiconductor device shown in FIG. 3K obtained by such a manufacturing method, the electrode layer 7 is composed of laminated electrode layers 27 and 27'.
It has the same structure as the semiconductor device shown in FIG. 1K obtained by the method for manufacturing a semiconductor device according to the first invention of the present application described in FIGS.

According to the method for manufacturing such a semiconductor device according to the first invention of the present application described above in FIGS. The first
This method is similar to the manufacturing method of the semiconductor device according to the first invention of the present application described above with reference to FIG. A-1.

Therefore, although a detailed explanation is omitted, in the case of the manufacturing method of the semiconductor device according to the first invention of the present application described above in FIGS. 3A to 3, the semiconductor device according to the first invention of the present application described above in FIGS. It has the same excellent characteristics as the manufacturing method of the device.

Further, in the case of the manufacturing method of the semiconductor device according to the first invention of the present application described in FIG. If the layer 27' is formed of metal as described above and the electrode layer 7 is led out from this electrode layer 27', the semiconductor device in which the electrode layer 7 is an electrode layer having low resistance can be obtained. It has the characteristic that it can be formed.

Next, a method for manufacturing a semiconductor device according to the fourth invention of the present application,
Let's explain it with an example.

4A to 4M show an embodiment of a method for manufacturing a semiconductor device according to the fourth invention of the present application, and corresponding parts to those in FIGS. 3A to 3I are given the same reference numerals and detailed explanations are omitted.

In an embodiment of the method for manufacturing a semiconductor device according to the fourth invention of the present application, as shown in FIGS. In the example, the steps from A to 1 in FIG. 3 are the same except that the semiconductor substrate 1 consists of only the semiconductor substrate body 1a instead of consisting of the semiconductor substrate body 1a and the insulating film 1b. on the main surface 2 of the semiconductor substrate 1,
An electrode layer 7 consisting of electrode layers 27 and 27' is formed, and impurity ions are formed in the semiconductor substrate body 1a of the semiconductor substrate 1 at both positions sandwiching the electrode layer 7 when viewed from the main surface 2. A configuration is obtained in which injection regions 9 and 1o are formed.

Next, by performing an isotropic etching process on the electrode m27 constituting the electrode layer 7, as shown in FIG. Thus, an electrode layer 37' consisting of electrode layers 27'' and 27' is formed.

Next, as shown in FIG. 4, a similar surface protection film 11 is formed by the same method as described above in FIG. 3.

Next, as shown in FIG. 4K, impurity introduced regions 12 and 13 similar to those described above in FIG. 3J are formed by the same Ayu-link process as described above in FIG. 3J.

Next, as shown in the fourth diagram, a window 1 through which the impurity-introduced regions 12 and 13 are exposed to the outside in the same manner as described above in FIG.
4 and 15 are formed, and then windows 1 are formed on the surface protection film 11.
Conductive layers 16 and 17 are formed in ohmic contact with the C impurity introduced regions 12 and 13 through the conductive layers 4 and 15, thereby obtaining the intended semiconductor device.

In this case, the electrode layer 37' is attached to the semiconductor substrate body 1a of the semiconductor substrate 1 so as to form a Schottky junction.

The following is an embodiment of a method for manufacturing a semiconductor device according to the fourth invention of the present application.

In the semiconductor device shown in the fourth diagram obtained by such a manufacturing method, the electrode layer 37' is used as a gate electrode, and the impurity introduced region 1
2 and 13 are source regions and drain regions, respectively, the region below the electrode layer 37 of the semiconductor substrate body 1a constituting the semiconductor substrate 1 is a channel region, and the conductive layers 16 and 17
It is clear that a MES type field effect transistor is constructed, with the source electrode and the drain electrode respectively.

The method for manufacturing a semiconductor device according to the fourth invention of the present application described in Sections 4A to 4L above, which manufactures a semiconductor device constituting a MES type field effect transistor, is similar to the method of manufacturing a semiconductor device according to the fourth invention of the present application described in FIG. 3A-. In the method for manufacturing a semiconductor device according to the third invention, an impurity ion implantation region 9 is implanted by implanting impurity ions 8 using the electrode layer 7 of FIG. 3H as a mask.
and 10, and the surface protective film 11 of FIG.
As shown in FIG. 4I, a step of forming an electrode layer 37' which is not connected to the impurity ion implantation region 9 from the electrode layer 7 is inserted between the step of forming the electrode layer 7 and the step of forming the impurity ion implantation region 9. , steps similar to those of the method for manufacturing a semiconductor device according to the third invention of the present application described above in FIG. 3A- are taken.

Therefore, although a detailed explanation will be omitted, in the case of the method for manufacturing a semiconductor device according to the fourth invention of the present application described above in FIGS. 4A to LS, FIGS. This method has the same excellent characteristics as the method for manufacturing semiconductor devices.

Next, a method for manufacturing a semiconductor device according to the fifth invention of the present application,
Let's explain it with an example.

FIG. 5A- shows a first embodiment of a method for manufacturing a semiconductor device according to the fifth invention of the present application, and corresponding parts in FIGS. 4A-L are given the same reference numerals and detailed explanations are omitted. do.

In an embodiment of the method for manufacturing a semiconductor device according to the fifth invention of the present application, as shown in FIGS. 5A to 5K, the method for manufacturing a semiconductor device according to the fourth invention of the present application described above in FIGS. In the example, the step of FIG. 41 is omitted, but the step of forming the electrode layer 27 shown in FIG. , forming an electrode layer 27'' similar to that obtained in the step of FIG. , is similar to the method for manufacturing a semiconductor device according to the fourth invention of the present application described above with reference to FIG.

The above is an example of the method for manufacturing a semiconductor device according to the fifth invention of the present application.

Such a manufacturing method is the same as the method for manufacturing a semiconductor device according to the fourth invention of the present application, except for the matters mentioned above, so a detailed explanation will be omitted, but it is similar to that described above in FIGS. It has the same excellent characteristics as the method for manufacturing a semiconductor device according to the fourth invention of the present application.

Note that in the above description, only one embodiment has been described for each of the inventions in Box 1, 2nd, 3rd, 4th, and 5th, and various modifications may be made without departing from the spirit of the present invention. Variations and changes may be made.

[Brief explanation of the drawing]

FIG. 1 is a route diagram showing the sequential steps of an embodiment of a method for manufacturing a semiconductor device according to the first invention of the present application. FIG. 2 is a route diagram showing the sequential steps of an embodiment of the method for manufacturing a semiconductor device according to the second invention of the present application. FIG. 3 is a route diagram showing sequential steps in an embodiment of the method for manufacturing a semiconductor device according to the third invention of the present application. FIG. 4 is a route diagram showing the sequential steps of an embodiment of a method for manufacturing a semiconductor device according to the fourth invention of the present application. FIG. 5 is a J route diagram showing the sequential steps of an embodiment of the method for manufacturing a semiconductor device according to the fifth invention of the present application. 1・・・・・・・・・・・・・・・・・・Semiconductor substrate 1
a...... Semiconductor substrate body 1b
・・・・・・・・・・・・Insulating film 2・・・・・・
・・・・・・・・・・・・Main surface 3・・・・・・・・・・・・
・・・・・・・・・Slanted end face 4・・・・・・・・・・・・
・・・・・・Level formation layer 5・・・・・・・・・・・・
・・・・・・Slope 6・・・・・・・・・・・・・・・
・・・Conductive layer 7・・・・・・・・・・・・・・・・・・
・Electrode layer 8...Impurity ions 9.10...Impurity ion implantation region 11... ...Surface protective film 1
2.13... Impurity introduced region 14.15...
...Window 16.17...Conductive layer 26.26'...Conductive layer 27.27', 27''...Electrode layer 37.37'... ...Electrode layer applicant Nippon Telegraph and Telephone Public Corporation Whistle 1 Fig. 2 Fig. 2 Fig. 1 IN Fig. 3 Fig. 3 U Fig. 4 Fig. 4 Fig. 5 Fig. 5 j l i l- (11l Figure 5 V/Continued from page 1 @ Inventor Yoshihiko Mizushima Inside Musashino Telecommunications Research Institute, Nippon Telegraph and Telephone Public Corporation, 3-9-11 Midoricho, Musashino City

Claims (1)

[Claims] 1. Forming a step formation layer having an inclined end face inclined with respect to the main surface on the main surface of the semiconductor substrate; , forming a conductive layer covering and extending the step forming layer and having an inclined surface facing the inclined end surface of the step forming layer; By directional etching from a direction approximately perpendicular to the
forming an electrode layer extending from the conductive layer onto the inclined end surface of the step-forming layer; removing the step-forming layer from the main surface of the semiconductor substrate'; using the electrode layer as a mask for the substrate;
Into the semiconductor substrate by implanting impurity ions from a direction substantially perpendicular to the main surface of the semiconductor substrate,
A method for manufacturing a semiconductor device, comprising the step of forming first and second impurity ion implantation regions at both positions sandwiching the electrode layer when viewed on the main surface thereof. 2. In the method for manufacturing a semiconductor device according to claim 1, the semiconductor substrate has a semiconductor substrate body and an insulating film formed on the semiconductor substrate body, and the main surface of the semiconductor substrate is , a method for manufacturing a semiconductor device, characterized in that the insulating film is formed on a surface opposite to the semiconductor substrate main body side. 3. Forming, on the main surface of the semiconductor substrate, a step-forming layer having an inclined end surface that is inclined with respect to the main surface; and covering the step-forming layer on the main surface of the semiconductor substrate. a step of forming a conductive layer extending from a direction substantially perpendicular to the main surface of the semiconductor substrate with respect to the conductive layer; By the directional etching process,
forming a first electrode layer extending from the conductive layer onto the inclined end surface of the step-forming layer; and removing the step-forming layer from the main surface of the semiconductor substrate; By implanting impurity ions into the semiconductor substrate from a direction substantially perpendicular to the main surface of the semiconductor substrate using the first electrode layer as a mask, the impurity ions are implanted into the semiconductor substrate on the main surface. and forming first and second impurity ion implantation regions at both positions sandwiching the first electrode layer;
From the first electrode layer by a directional etching process from a direction substantially perpendicular to the main surface of the semiconductor substrate,
forming a second electrode layer whose side surface, which is not in the shadow when viewed from the direction in which the directional etching process is performed, is removed by a predetermined thickness. Manufacturing method. 4. Forming, on the main surface of the semiconductor substrate, a step-forming layer having an inclined end surface that is inclined with respect to the main surface; and covering the step-forming layer on the main surface of the semiconductor substrate. forming a first conductive layer extending from the top and having an inclined surface opposite to the inclined end surface of the step forming layer; forming a second conductive layer having an inclined surface opposite to the inclined surface, and directing the first and second conductive layers from a direction substantially perpendicular to the main surface of the semiconductor substrate forming a third electrode layer extending from the second conductive layer onto the first conductive layer by etching; and forming a third electrode layer extending from the first conductive layer onto the first conductive layer; forming a fourth electrode layer extending on the sloped surface of the layer, thus forming a third electrode layer;
and a step of forming a fifth electrode layer consisting of a fourth electrode layer, a step of removing the step forming layer from the main surface of the semiconductor substrate, and a step of forming the fifth electrode layer on the semiconductor substrate. By implanting impurity ions as a mask in a direction substantially perpendicular to the main surface of the semiconductor substrate, the fifth electrode layer is sandwiched in the semiconductor substrate when viewed from the main surface thereof. forming first and second impurity ion implantation regions at both positions, respectively. 5. The method for manufacturing a semiconductor device according to claim 4, wherein the semiconductor substrate has a semiconductor substrate body and an insulating film formed on the semiconductor substrate body, and the main surface of the semiconductor substrate is , a method for manufacturing a semiconductor device, characterized in that the insulating film is formed on a surface opposite to the semiconductor substrate main body side. 6. Forming, on the main surface of the semiconductor substrate, a step-forming layer having an inclined end surface that is inclined with respect to the main surface; and covering the step-forming layer on the main surface of the semiconductor substrate. forming a first conductive layer extending from the top and having an inclined surface opposite to the inclined end surface of the step forming layer; forming a second conductive layer having an inclined surface opposite to the inclined surface, and directing the first and second conductive layers from a direction substantially perpendicular to the main surface of the semiconductor substrate A third electrode layer extending from the second conductive layer onto the first conductive layer is formed by an etching process, and a third electrode layer is formed from the first conductive layer by etching the step. forming a fourth electrode layer extending on the inclined surface of the forming layer, thus forming a fifth electrode layer consisting of the third and fourth electrode layers; A sixth electrode layer overhanging the third electrode layer is formed from the fourth electrode layer by an isotropic etching process on the electrode layer using the third electrode layer as a mask. Therefore, a step of forming a seventh electrode layer consisting of the third and sixth electrode layers;
removing the step-forming layer from above the main surface of the semiconductor substrate; forming first and second impurity ion implantation regions in the semiconductor substrate at both positions sandwiching the seventh electrode layer when viewed from the main surface of the semiconductor substrate by an impurity ion implantation process; A method for manufacturing a semiconductor device, comprising the steps of: 7. Forming, on the main surface of the semiconductor substrate, a step-forming layer having an inclined end face that is inclined with respect to the main surface; and covering the step-forming layer on the main surface of the semiconductor substrate. forming a first conductive layer extending from the top and having an inclined surface opposite to the inclined end surface of the step forming layer; forming a second conductive layer having an inclined surface opposite to the inclined surface; and directional etching of the second conductive layer from a direction substantially perpendicular to the main surface of the semiconductor substrate. forming a third electrode layer extending from the second conductive layer over the first conductive layer by processing; By isotropic etching using the second electrode layer as a mask, the first conductive layer is extended onto the inclined surface of the step forming layer, and the third electrode layer is overhanged. forming a seventh electrode layer consisting of the third and sixth electrode layers; and removing the step forming layer from the main surface of the semiconductor substrate. Step 1: Implanting impurity ions into the semiconductor substrate from a direction substantially perpendicular to the main surface of the semiconductor substrate using the seventh electrode layer as a mask. A method for manufacturing a semiconductor device, comprising the step of forming first and second impurity ion implantation regions at both positions sandwiching the seventh electrode layer when viewed on the main surface.