JPS59148352A - 半導体装置の電極形成方法 - Google Patents
半導体装置の電極形成方法Info
- Publication number
- JPS59148352A JPS59148352A JP58022310A JP2231083A JPS59148352A JP S59148352 A JPS59148352 A JP S59148352A JP 58022310 A JP58022310 A JP 58022310A JP 2231083 A JP2231083 A JP 2231083A JP S59148352 A JPS59148352 A JP S59148352A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- barrier layer
- base metal
- transparent heat
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 230000015572 biosynthetic process Effects 0.000 title description 5
- 229910000679 solder Inorganic materials 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 239000010953 base metal Substances 0.000 claims abstract description 12
- 230000004888 barrier function Effects 0.000 claims abstract description 11
- 230000004907 flux Effects 0.000 claims abstract description 6
- 239000002184 metal Substances 0.000 claims description 11
- 239000000853 adhesive Substances 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 2
- 239000010453 quartz Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 239000003973 paint Substances 0.000 claims 3
- 208000025174 PANDAS Diseases 0.000 claims 1
- 208000021155 Paediatric autoimmune neuropsychiatric disorders associated with streptococcal infection Diseases 0.000 claims 1
- 238000005530 etching Methods 0.000 abstract description 4
- 238000007740 vapor deposition Methods 0.000 abstract description 4
- 238000002161 passivation Methods 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract description 2
- 230000008569 process Effects 0.000 description 6
- 238000009713 electroplating Methods 0.000 description 5
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/11334—Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58022310A JPS59148352A (ja) | 1983-02-14 | 1983-02-14 | 半導体装置の電極形成方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58022310A JPS59148352A (ja) | 1983-02-14 | 1983-02-14 | 半導体装置の電極形成方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59148352A true JPS59148352A (ja) | 1984-08-25 |
| JPS6348427B2 JPS6348427B2 (enrdf_load_stackoverflow) | 1988-09-29 |
Family
ID=12079160
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58022310A Granted JPS59148352A (ja) | 1983-02-14 | 1983-02-14 | 半導体装置の電極形成方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59148352A (enrdf_load_stackoverflow) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0254932A (ja) * | 1988-08-20 | 1990-02-23 | Fujitsu Ltd | はんだバンプの形成方法 |
| JPH04263434A (ja) * | 1991-02-19 | 1992-09-18 | Matsushita Electric Ind Co Ltd | 電気的接続接点の形成方法および電子部品の実装方法 |
| WO1998009332A1 (en) * | 1996-08-27 | 1998-03-05 | Nippon Steel Corporation | Semiconductor device provided with low melting point metal bumps and process for producing same |
| US7038315B2 (en) * | 1995-05-08 | 2006-05-02 | Micron Technology, Inc. | Semiconductor chip package |
| JP2008159948A (ja) * | 2006-12-25 | 2008-07-10 | Rohm Co Ltd | 半導体装置 |
-
1983
- 1983-02-14 JP JP58022310A patent/JPS59148352A/ja active Granted
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0254932A (ja) * | 1988-08-20 | 1990-02-23 | Fujitsu Ltd | はんだバンプの形成方法 |
| JPH04263434A (ja) * | 1991-02-19 | 1992-09-18 | Matsushita Electric Ind Co Ltd | 電気的接続接点の形成方法および電子部品の実装方法 |
| US7038315B2 (en) * | 1995-05-08 | 2006-05-02 | Micron Technology, Inc. | Semiconductor chip package |
| WO1998009332A1 (en) * | 1996-08-27 | 1998-03-05 | Nippon Steel Corporation | Semiconductor device provided with low melting point metal bumps and process for producing same |
| JP2001501366A (ja) * | 1996-08-27 | 2001-01-30 | 新日本製鐵株式会社 | 低融点金属のバンプを備えた半導体装置及びその製造方法 |
| US7045388B2 (en) | 1996-08-27 | 2006-05-16 | Nippon Steel Corporation | Semiconductor device provided with low melting point metal bumps |
| US7045389B1 (en) | 1996-08-27 | 2006-05-16 | Nippon Steel Corporation | Method for fabricating a semiconductor devices provided with low melting point metal bumps |
| EP1918991A3 (en) * | 1996-08-27 | 2011-02-16 | Nippon Steel Corporation | Semiconductor device provided with low melting point metal bumps and process for producing same |
| JP2008159948A (ja) * | 2006-12-25 | 2008-07-10 | Rohm Co Ltd | 半導体装置 |
| US9343416B2 (en) | 2006-12-25 | 2016-05-17 | Rohm Co., Ltd. | Semiconductor device employing wafer level chip size package technology |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6348427B2 (enrdf_load_stackoverflow) | 1988-09-29 |
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