JPS59145538A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法Info
- Publication number
- JPS59145538A JPS59145538A JP19596983A JP19596983A JPS59145538A JP S59145538 A JPS59145538 A JP S59145538A JP 19596983 A JP19596983 A JP 19596983A JP 19596983 A JP19596983 A JP 19596983A JP S59145538 A JPS59145538 A JP S59145538A
- Authority
- JP
- Japan
- Prior art keywords
- polycrystalline
- groove
- film
- etching
- si3n4
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/763—Polycrystalline semiconductor regions
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19596983A JPS59145538A (ja) | 1983-10-21 | 1983-10-21 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19596983A JPS59145538A (ja) | 1983-10-21 | 1983-10-21 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59145538A true JPS59145538A (ja) | 1984-08-21 |
JPH0427704B2 JPH0427704B2 (de) | 1992-05-12 |
Family
ID=16350000
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19596983A Granted JPS59145538A (ja) | 1983-10-21 | 1983-10-21 | 半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59145538A (de) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007002426A2 (en) * | 2005-06-21 | 2007-01-04 | Intel Corporation | Semiconductor device structures and methods of forming semiconductor structures |
US7960794B2 (en) | 2004-08-10 | 2011-06-14 | Intel Corporation | Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow |
US8067818B2 (en) | 2004-10-25 | 2011-11-29 | Intel Corporation | Nonplanar device with thinned lower body portion and method of fabrication |
JP2012151491A (ja) * | 2012-03-22 | 2012-08-09 | Renesas Electronics Corp | 半導体装置 |
US8268709B2 (en) | 2004-09-29 | 2012-09-18 | Intel Corporation | Independently accessed double-gate and tri-gate transistors in same process flow |
US8362566B2 (en) | 2008-06-23 | 2013-01-29 | Intel Corporation | Stress in trigate devices using complimentary gate fill materials |
US8405164B2 (en) | 2003-06-27 | 2013-03-26 | Intel Corporation | Tri-gate transistor device with stress incorporation layer and method of fabrication |
US9048314B2 (en) | 2005-02-23 | 2015-06-02 | Intel Corporation | Field effect transistor with narrow bandgap source and drain regions and method of fabrication |
US9806195B2 (en) | 2005-06-15 | 2017-10-31 | Intel Corporation | Method for fabricating transistor with thinned channel |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53129589A (en) * | 1977-04-18 | 1978-11-11 | Fujitsu Ltd | Integrated circuit unit |
JPS54154283A (en) * | 1978-05-25 | 1979-12-05 | Ibm | Lateral transistor structure |
-
1983
- 1983-10-21 JP JP19596983A patent/JPS59145538A/ja active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53129589A (en) * | 1977-04-18 | 1978-11-11 | Fujitsu Ltd | Integrated circuit unit |
JPS54154283A (en) * | 1978-05-25 | 1979-12-05 | Ibm | Lateral transistor structure |
Cited By (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8405164B2 (en) | 2003-06-27 | 2013-03-26 | Intel Corporation | Tri-gate transistor device with stress incorporation layer and method of fabrication |
US7960794B2 (en) | 2004-08-10 | 2011-06-14 | Intel Corporation | Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow |
US8399922B2 (en) | 2004-09-29 | 2013-03-19 | Intel Corporation | Independently accessed double-gate and tri-gate transistors |
US8268709B2 (en) | 2004-09-29 | 2012-09-18 | Intel Corporation | Independently accessed double-gate and tri-gate transistors in same process flow |
US10236356B2 (en) | 2004-10-25 | 2019-03-19 | Intel Corporation | Nonplanar device with thinned lower body portion and method of fabrication |
US9741809B2 (en) | 2004-10-25 | 2017-08-22 | Intel Corporation | Nonplanar device with thinned lower body portion and method of fabrication |
US8067818B2 (en) | 2004-10-25 | 2011-11-29 | Intel Corporation | Nonplanar device with thinned lower body portion and method of fabrication |
US9190518B2 (en) | 2004-10-25 | 2015-11-17 | Intel Corporation | Nonplanar device with thinned lower body portion and method of fabrication |
US9048314B2 (en) | 2005-02-23 | 2015-06-02 | Intel Corporation | Field effect transistor with narrow bandgap source and drain regions and method of fabrication |
US9368583B2 (en) | 2005-02-23 | 2016-06-14 | Intel Corporation | Field effect transistor with narrow bandgap source and drain regions and method of fabrication |
US9806195B2 (en) | 2005-06-15 | 2017-10-31 | Intel Corporation | Method for fabricating transistor with thinned channel |
WO2007002426A2 (en) * | 2005-06-21 | 2007-01-04 | Intel Corporation | Semiconductor device structures and methods of forming semiconductor structures |
US7547637B2 (en) * | 2005-06-21 | 2009-06-16 | Intel Corporation | Methods for patterning a semiconductor film |
US9761724B2 (en) | 2005-06-21 | 2017-09-12 | Intel Corporation | Semiconductor device structures and methods of forming semiconductor structures |
WO2007002426A3 (en) * | 2005-06-21 | 2007-03-15 | Intel Corp | Semiconductor device structures and methods of forming semiconductor structures |
US8362566B2 (en) | 2008-06-23 | 2013-01-29 | Intel Corporation | Stress in trigate devices using complimentary gate fill materials |
US9224754B2 (en) | 2008-06-23 | 2015-12-29 | Intel Corporation | Stress in trigate devices using complimentary gate fill materials |
US9450092B2 (en) | 2008-06-23 | 2016-09-20 | Intel Corporation | Stress in trigate devices using complimentary gate fill materials |
US9806193B2 (en) | 2008-06-23 | 2017-10-31 | Intel Corporation | Stress in trigate devices using complimentary gate fill materials |
JP2012151491A (ja) * | 2012-03-22 | 2012-08-09 | Renesas Electronics Corp | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
JPH0427704B2 (de) | 1992-05-12 |
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