JPS59117280A - 半導体発光装置 - Google Patents

半導体発光装置

Info

Publication number
JPS59117280A
JPS59117280A JP57230881A JP23088182A JPS59117280A JP S59117280 A JPS59117280 A JP S59117280A JP 57230881 A JP57230881 A JP 57230881A JP 23088182 A JP23088182 A JP 23088182A JP S59117280 A JPS59117280 A JP S59117280A
Authority
JP
Japan
Prior art keywords
light emitting
bonding
light
emitting device
emitting part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57230881A
Other languages
English (en)
Inventor
Yojiro Kamei
洋次郎 亀井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP57230881A priority Critical patent/JPS59117280A/ja
Publication of JPS59117280A publication Critical patent/JPS59117280A/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494Connecting portions
    • H01L2224/4943Connecting portions the connecting portions being staggered
    • H01L2224/49433Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔技術分野〕 本発明は発光素子アレイを有する半導体発光装置に関し
、特にトリミング手段に改良を加えた発光装置に関する
〔従来技術〕
発光素子アレイを有する発光装置において5.各発光部
の発光出力全調整するには、従来個別電極側に抵抗体を
形成し、ワイヤボンディングを行なう前筐たは後に抵抗
体をレーザでトリミングしていた。しかるに、この方法
では、レーザトリミングという工程が別個に必要なため
、製造に要する時間が長く、また歩留りが低いという問
題があった。また、レーザトリマー自体も高価であり、
これらのため発光装置の製造コストが高くなるという問
題があった。
〔目的〕
本発明の目的はトリミング(光量調整)が容易な発光装
置を提供することにある。
〔構成〕
以下、不発明の構成を、実施例に基いて説明する。
第を図および第2図は本発明の一実施例を示したもので
ある。図示のように、基板[上の共通電極2に、半導体
発光素子アレイ3を構成する半導体結晶体4がダイボン
ディングされている。このアレイ3は複数の発光部5を
有するもので、各発光部5に対して、発光窓6とコンタ
クト1極7とが設けられている。
基板【上には、さらに、アレイ3に隣接する位置に、各
発光部5に対応して帯状の抵抗体8が形成されτいる。
抵抗体8は、図示のように、アレイ3の延びる方向に直
角な方向に延びるように配向され、アレイ3から遠い側
の端部8aが個別電極を形成している。抵抗体8は例え
ばNi−0r。
Ta−N等で形成される。
各抵抗体8の上には、図示のように、秒数のポンディン
グパッド9a〜9dが設けられているこのポンディング
パッド例えばフォトリソグラフィーとメッキとにより形
成される。
各発光部については、ボンディング以前に、プローバー
を用いて、あるいはフオトルミネセン7の測定によシ、
電気的特性、発売特性を測定しておく。そして、このデ
ータに基いて、同一電圧で駆動した時に、各発光部の発
光の明るさが同一になるように、各発光部に対応する抵
抗体のポンディングパッド9a〜9dを選択し、ゾロ択
されたバッド9a〜9dとコンタクト電極7とをボンデ
ィングワイヤ10で接続する。
抵抗体の材料、膜厚、寸法等は発光素子の特性、ばらつ
き等の諸条件に応じて最適なもの全選択し得る。
尚、上記の実施例では、選択されたポンディングパッド
とコンタクト電極とをボンディングワイヤにより直接接
続しているが、第3図に示すように、各抵抗体のポンデ
ィングパッドのうち、対応する発光部に最も近いもの(
9a)とコンタクト電極とを接続し、トリミングのため
に選択されたポンディングパッドがポンディングパッド
9a以外のものであるとき、選択されたポンディングパ
ッド(9b〜9d)とポンディングパッド9aと全ボン
ディングワイヤで接続するようにしてもよい。
〔効果〕
以上のように本発明によれば、各発光部に対応する帯状
の抵抗体に複数のポンディングパッドを設け、ポンディ
ングパッドの一つを選択してボンディングすることによ
りトリミーングを行なっているので、特別な工程を加え
ることなく、また従来の工程に大幅な変更を加えること
なく、トリミングを行なうことができる。また、ワイヤ
ボンディングの偉頼性は高いので、歩留りも高くなる。
【図面の簡単な説明】
第【図は本発明一実施例の発光装置を示す平面図、第2
図は第1図の■−■細断面図、第3図は本発明の池の実
施例の平面図である。 1・・・基板、2・・・共通電極、3・・・発光素子ア
レイ、4・・・結晶体、5・・・発光部、6・・・発光
窓、7・・・コンタクト電極、8・・・抵抗体、8a・
・・個別電極、9a〜9d・・・ポンディングパッド、
io・・・ボンディングワイヤ。 出願人代理人  猪 股   清

Claims (1)

  1. 【特許請求の範囲】 (1)複数の発光部を有する発光素子アレイと、該アレ
    イの発光部にそれぞれ対応して基板上に設けられた帯状
    の抵抗体と、各抵抗体上に設けられた複数のポンディン
    グパッドとを備え、各発光部のコンタク[極と対応する
    抵抗体上のポンディングパッドの一つとをボンディング
    ワイヤにより面接または間接に接続するようにした半導
    体発光装置。 (2、特許請求の範囲第1項記載の発光装置において、
    各コンタク)!極と、対応する抵抗体の一端付近の第1
    のポンディングパッドと會ボンディングワイヤで接続し
    、トリミングのために選択されたポンディングパッドが
    前記第1のポンディングパッドとは異なる巣2のポンデ
    ィングパッドでめるとき、前記第1のポンディングパッ
    ドと前記第2のポンディングパッドとをボンディングワ
    イヤで接続するようにしたことを特徴とする発光装置。 (3)特許請求の範囲第1項記載の発光装置において、
    前記発光素子アレイを構成する半導体結晶体が、前記基
    板上の共通電極にダイボンディングされていること全特
    徴とする発光装置。
JP57230881A 1982-12-24 1982-12-24 半導体発光装置 Pending JPS59117280A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57230881A JPS59117280A (ja) 1982-12-24 1982-12-24 半導体発光装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57230881A JPS59117280A (ja) 1982-12-24 1982-12-24 半導体発光装置

Publications (1)

Publication Number Publication Date
JPS59117280A true JPS59117280A (ja) 1984-07-06

Family

ID=16914763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57230881A Pending JPS59117280A (ja) 1982-12-24 1982-12-24 半導体発光装置

Country Status (1)

Country Link
JP (1) JPS59117280A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61104566U (ja) * 1984-12-14 1986-07-03
JPS62268170A (ja) * 1986-05-16 1987-11-20 Hitachi Cable Ltd 発光ダイオ−ドの発光強度調整方法および発光ダイオ−ドアレイ
EP0942474A3 (de) * 1998-03-11 2002-06-05 Siemens Aktiengesellschaft Leuchtdiode
JP2007080877A (ja) * 2005-09-09 2007-03-29 Matsushita Electric Works Ltd Led光源の色調補正方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61104566U (ja) * 1984-12-14 1986-07-03
JPS62268170A (ja) * 1986-05-16 1987-11-20 Hitachi Cable Ltd 発光ダイオ−ドの発光強度調整方法および発光ダイオ−ドアレイ
EP0942474A3 (de) * 1998-03-11 2002-06-05 Siemens Aktiengesellschaft Leuchtdiode
JP2007080877A (ja) * 2005-09-09 2007-03-29 Matsushita Electric Works Ltd Led光源の色調補正方法

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