JPS59109142U - 半導体素子の樹脂封入成形用金型装置 - Google Patents
半導体素子の樹脂封入成形用金型装置Info
- Publication number
- JPS59109142U JPS59109142U JP1983002031U JP203183U JPS59109142U JP S59109142 U JPS59109142 U JP S59109142U JP 1983002031 U JP1983002031 U JP 1983002031U JP 203183 U JP203183 U JP 203183U JP S59109142 U JPS59109142 U JP S59109142U
- Authority
- JP
- Japan
- Prior art keywords
- mold
- resin
- cavity
- semiconductor elements
- resin encapsulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983002031U JPS59109142U (ja) | 1983-01-11 | 1983-01-11 | 半導体素子の樹脂封入成形用金型装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983002031U JPS59109142U (ja) | 1983-01-11 | 1983-01-11 | 半導体素子の樹脂封入成形用金型装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59109142U true JPS59109142U (ja) | 1984-07-23 |
JPS6240433Y2 JPS6240433Y2 (enrdf_load_stackoverflow) | 1987-10-16 |
Family
ID=30133729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1983002031U Granted JPS59109142U (ja) | 1983-01-11 | 1983-01-11 | 半導体素子の樹脂封入成形用金型装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59109142U (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005078807A1 (ja) * | 2004-02-17 | 2005-08-25 | Matsushita Electric Industrial Co., Ltd. | 光電変換プラグとそれを用いた光電変換モジュール、及びその光電変換プラグの製造方法 |
-
1983
- 1983-01-11 JP JP1983002031U patent/JPS59109142U/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005078807A1 (ja) * | 2004-02-17 | 2005-08-25 | Matsushita Electric Industrial Co., Ltd. | 光電変換プラグとそれを用いた光電変換モジュール、及びその光電変換プラグの製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JPS6240433Y2 (enrdf_load_stackoverflow) | 1987-10-16 |
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