JPS59107517A - Formation of pattern - Google Patents

Abstract

PURPOSE:To facilitate etching and prevent formation of any undercut, by employing ultraviolet irradiation and a reactive ion etching or reactive sputtering etching. CONSTITUTION:A photoresist layer 202 is formed on a semiconductor substrate 201 having a step so as to flatten the surface of the substrate 201. A photoresist 203 is formed on the upper surface of the layer 202. A photoresist pattern 204 is then formed. With the pattern 204 employed as a mask, the whole surface is irradiated with an ultraviolet ray. As a result, the film thicknesses of the underlayer photoresists 205, 206 in the regions which are not coated with the pattern are reduced. With the pattern 204 employed as a mask, the resists 205, 206 are etched by a reactive ion etching or reactive sputtering etching to obtain a photoresist pattern 207. Thus, formation of any undercut is prevented. Further, etching is facilitated by practically improving the selection ratio between the pattern 204 and the film 202, and it is possible to realize formation of a minute pattern.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming a pattern, and particularly to a method of forming a fine pattern.

In recent years, as semiconductors and integrated circuit devices have become more highly integrated, methods for forming fine patterns have become important. In particular, recent semiconductor integrated circuit devices often use multilayer wiring structures to increase density.
As a result, unevenness inevitably occurs on the semiconductor substrate, and in some cases, there are large steps as large as 2 .mu.n. When forming a fine pattern on a semiconductor substrate having such a large step difference, many problems arise, such as poor step coverage of the photoresist at the step portion and variation in pattern dimensions at the top and bottom of the step. As one method for solving such problems, multilayer resist technology has recently been attracting attention.

FIGS. 1 through 3 illustrate two main causes of conventional multilayer resist technology. This method is used in the Journal of V
acum 8eience Technology
As stated in Vol. 16, No. 6, P, 1669, 1979, 1.5~
By applying a thick photoresist layer 102 having a thickness of about 2 μm, the steps on the semiconductor substrate 101 are leveled (FIG. 1). This photoresist ff1102 is mainly made of PMMA (poly methyl methacrylate),
PGMA (polyglycidyl φ methacrylate) or the like is used. Next, on the top of the photoresist layer 102, 0.
A thin photoresist layer 103 with a thickness of about 5 μm is applied, exposed and developed to form a pattern (FIG. 2).

As the photoresist layer 103, for example, AZ135o manufactured by Silapray, HP 204 manufactured by Hunt, etc. are used. Next, using the photoresist layer 103 as a mask, D
After irradiating the entire surface with eep UV light (wavelength: 200 to 250 nm), development is performed to form a pattern of the photoresist layer 102, and the process is completed. For example, when chlorobenzene is used as the developer, the photoresist layer 103 remains as is, as shown in FIG. 3, and when MIBK (methyl isobuty-ketone) is used, as shown in FIG. As such, photoresist layer 103 is removed.

According to this method, the step on the surface of the semiconductor substrate 101 is flattened by the thick photoresist layer 102, so there is no change in the thickness of the photoresist layer 103 at the top and bottom m5 of the step. As a result, since there is no difference in the optimum exposure amount between the two, there is no change in pattern dimensions. Furthermore, since the step coverage is good, it is possible to reduce the thickness of the photoresist layer 103.
You can expect high resolution.

However, according to this method, the photoresist layer 1
Since the method for forming pattern 02 is a wet development method, development not only in the vertical direction but also in the horizontal direction occurs simultaneously in the development process.

As a result, the pattern of the photoresist layer 102 is smaller than the pattern size of the photoresist 4103 by υ.
Undercuts occur and machining accuracy deteriorates.

Particularly when forming a fine pattern, the pattern size of the photoresist layer 102 becomes smaller and smaller due to this undercut, and in the worst case, the pattern disappears. Therefore, it is impossible to form fine patterns using conventional methods that cause such undercuts.

An object of the present invention is to provide a high-resolution pattern forming method by preventing the above-described undercut.

The present invention provides a method for forming a 7-photoresist pattern on a semiconductor substrate having a step on its surface, comprising: forming a first coating film on the semiconductor substrate to flatten the step;
a step of forming a second coating film on the first coating film to form a desired pattern; a step of irradiating ultraviolet light after forming the desired pattern on the second coating film; The method is characterized by including a step of processing the first coating film by reactive ion etching or reactive sputter etching using the second coating film as a mask.

The first property of the present invention is that when ultraviolet light is irradiated using the upper second coating film having a desired pattern as a mask, only the thickness of the lower first coating film in the irradiated area decreases. This is based on the second property that reactive ion etching or reactive sputter etching has strong anisotropy and that etching does not proceed in the lateral direction. According to the present invention, undercutting is prevented by processing the underlying first coating film by reactive ion etching or reactive sputter etching having a second property;
By using the first property to substantially improve the etching speed ratio, the so-called selectivity, between the upper and lower coating films, which is the most problematic in this process, the above-mentioned etching becomes easier. , formation of fine patterns can be realized.

Hereinafter, the present invention will be explained in detail using the drawings. 5 to 8 are main process diagrams in one embodiment of the present invention. FIG. 9 and FIG. 10 show the PGMAO film thickness reduction characteristics in response to ultraviolet photothermal in, cc in oxygen, respectively. This is the etching rate characteristic of AZ1350 and PGMA at 4°C.

First, as shown in FIG.
01, a thick photoresist layer 20 with a film thickness of 1.5 μm
2 is formed and flattened, and then a film of 0.5 μm in thickness is formed on the top surface.
A thin photoresist layer 203 of m is formed. For example, the photoresist layers 202 and 203 are made of Tokyo Ohkayome 0E.
BR-1000 (PGMA), AZ1 manufactured by Shiraplay
350 respectively. Since the photoresist layer 203 is formed on the top surface of the photoresist layer 202, which has a flat surface, there is no problem with step coverage at the step portion of the semiconductor substrate 201, and there is no problem with film thickness variation between the top and bottom of the step. There is no. Therefore, the controllability of pattern dimensions is good, and high resolution can be achieved by making the film thinner. then the 6th
As shown in the figure, after exposure with e.g. electron beam, light, etc.
It is developed to form a photoresist pattern 204.

Next, using the photoresist pattern 204 as a mask,
Irradiate the entire surface with ultraviolet light. This ultraviolet light has a wavelength of 240 nm or less in a region that is non-transparent to the upper layer photoresist pattern 204 and exposes the lower layer photoresist pattern 202, and is used in this embodiment. As shown in FIG. 9, when the PGMA, which is the lower layer 7 photoresist 202, is irradiated with ultraviolet light, only the film thickness of the irradiated region decreases. Although the amount of decrease in film thickness increases as the amount of ultraviolet light irradiation increases, from the point of view of practical irradiation time, for example, IOJ/d is used. As a result, as shown in FIG.
The film thickness is reduced by about 2300X. Next, using the upper layer photoresist pattern 204 as a mask, the lower layer photoresist 205 and 206 are etched by reactive ion e-etching or reactive sputter etching as shown in FIG.
get. The first important point in this etching is the etching selectivity between the upper layer photoresist pattern 204 and the lower layer photoresists 205 and 206. , 206 has been reduced by about 2300X, the time required to remove it can be shortened accordingly.

Therefore, the decrease in the film thickness of the upper layer 7 photoresist pattern 204 that occurs during this etching is reduced, and furthermore, the etching rate of the resist is increased by this irradiation, so that the etching selectivity is substantially improved and reactive ions are removed.・Etching or reactive sputter etching becomes easy.

As the etching gas, a mixed gas of oxygen and CCt4 is used, and the mixing ratio is set to a CCt4 concentration of 80%, which provides the best selectivity, as shown in FIG.

The etching rate at this time was approximately 70X/min for AZ1350, which is the upper layer photoresist pattern 204, and 6001/min for PGMA, which is the lower layer photoresist pattern, and the etching selection ratio was 1:8.6.

The second important point is that reactive ion etching or reactive sputter etching is highly anisotropic etching and does not proceed in the lateral or lateral direction. Therefore, the dimensions of the lower layer 7 photoresist pattern 207 in FIG. 8 formed by this etching are exactly the same as the dimensions of the upper layer photoresist pattern 204, which is a mask, and there is no undercut, making it easy to form fine patterns. It is possible.

As described above, according to the present invention, undercutting is prevented by processing the lower first coating film with highly anisotropic reactive ion etching or reactive sputter etching. Prior to the processing process,
This etching is facilitated by irradiating the first coating film with ultraviolet light using the second coating film as a mask to substantially improve the selectivity between the first coating film and the second coating film, which serves as an etching mask. However, it is possible to form fine patterns.

[Brief explanation of drawings]

1 to 4 are main process diagrams of the prior art, and FIGS. 5 to 8 are main process diagrams of an embodiment of the present invention. FIG. 9 shows the film thickness reduction characteristics of PGMA with respect to the amount of ultraviolet light irradiation, and FIG. 10 shows the etching rate characteristics of AZ1350 and PGMA with respect to the CCt 4 concentration in oxygen. Oka, in the figure, 101...semiconductor substrate, 10
2...Photoresist layer, 103...
Photoresist layer, 201...Semiconductor substrate, 2
02...Photoresist Mi, 203...
... Photoresist layer, 204 ... Photoresist pattern, 2o5 ... Photoresist layer,
206...Photoresist layer, 2o7...
...It is a photoresist pattern.

Claims (1)

[Claims] In a method for forming a photoresist pattern on a semiconductor substrate having no steps on the surface, a first step is to flatten the steps.
, a step of forming an annular layer on the semiconductor substrate, a step of forming a second coating film on the first coating film to form a desired pattern, and a step of forming a second coating film on the first coating film. After forming the desired pattern, apply ultraviolet light to the first step and then the second step.
ii) A method for forming a pattern, which includes the step of processing the MBS 4 in the first direction by reactive ion etching or reactive sputter etching using Mk as a mask.