JPS5893092A - Matrix type liquid crystal display - Google Patents

Matrix type liquid crystal display

Info

Publication number
JPS5893092A
JPS5893092A JP56193528A JP19352881A JPS5893092A JP S5893092 A JPS5893092 A JP S5893092A JP 56193528 A JP56193528 A JP 56193528A JP 19352881 A JP19352881 A JP 19352881A JP S5893092 A JPS5893092 A JP S5893092A
Authority
JP
Japan
Prior art keywords
liquid crystal
crystal display
type liquid
storage capacitor
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56193528A
Other languages
Japanese (ja)
Inventor
隆夫 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56193528A priority Critical patent/JPS5893092A/en
Publication of JPS5893092A publication Critical patent/JPS5893092A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 この発明は複数個のゲート線、及びソース線を備えた複
数iのTPT等の能動素子の他、蓄積コンデンサー等を
有するTFTアレイ等の半導体装置のゲー)J[lj、
ゲート絶縁膜、蓄積コンデンサー電極、及び誘電体の構
成材料、及びその製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device such as a TFT array having a storage capacitor, etc., in addition to active elements such as a plurality of TPTs having a plurality of gate lines and source lines. ,
The present invention relates to constituent materials of gate insulating films, storage capacitor electrodes, and dielectrics, and methods of manufacturing the same.

第1図はT’FTアレイの構成を、第2図はマトリクス
型液晶表示装置の構成を説明するための断面構造図であ
る。図において、(1jはゲート線、(21はソース線
、(3)はドレイン電極、(41はT P T 、 +
51は表示電極、(6)は蓄積コンデンサー、(7)は
液晶。
FIG. 1 is a cross-sectional structural diagram for explaining the configuration of a T'FT array, and FIG. 2 is a cross-sectional structural diagram for explaining the configuration of a matrix type liquid crystal display device. In the figure, (1j is a gate line, (21 is a source line, (3) is a drain electrode, (41 is T P T , +
51 is a display electrode, (6) is a storage capacitor, and (7) is a liquid crystal.

C81はTPT7しく、+91はTFTアレイ基板、 
(1(Iは透明導電膜、 (111はカラーフィルター
、C2は対向基板、(13はマトリクス型液晶表示装置
を示している。
C81 is TPT7, +91 is TFT array board,
(1 (I is a transparent conductive film, (111 is a color filter, C2 is a counter substrate, (13 is a matrix type liquid crystal display device.

従来この種の装置として第3図、!4図に示すものがあ
った。第3図はT−FTアレイ画素の平面図、第4図は
第3図A−A’部の断面構造図を示したものである、図
において、(l)はゲート線、C2)はソース線、(3
)はドレイン電極、15)は表示電極、(8)はTFT
アレイ、(9)はTFTアレイ基板、C4は半導体、 
(LSは蓄積コンデンサー電極、αGはゲート絶縁膜、
αηは誘電体を示しているう まず18I1図、第2図とともに7トリクス型液晶表示
装置の構成を説明する。マトリクス型液晶表示装置u3
は複数個のゲート線(1)、及びこれらのゲート線と直
交するソース線(2)とを備え、その交点に例えばT 
P T f41等の能動素子が形成され、そのドレイン
電tili f31 、表示電極(5)、及び信号蓄積
コンデンサー(6)を有する構造のTFTアレイ(8)
を形成したT″FTFTアレイ基板と、これと対向する
透明導電膜11Q、赤、緑、青等のカラーフィルターσ
υ。
Conventionally, this type of device is shown in Figure 3! There was one shown in Figure 4. Fig. 3 is a plan view of the T-FT array pixel, and Fig. 4 is a cross-sectional structural diagram of the section A-A' in Fig. 3. In the figure, (l) is the gate line, and C2) is the source line. Line, (3
) is the drain electrode, 15) is the display electrode, (8) is the TFT
array, (9) is a TFT array substrate, C4 is a semiconductor,
(LS is the storage capacitor electrode, αG is the gate insulating film,
αη indicates a dielectric material.The structure of a 7-trix liquid crystal display device will be explained with reference to FIGS. 18I1 and 2. FIG. Matrix type liquid crystal display device u3
is equipped with a plurality of gate lines (1) and a source line (2) orthogonal to these gate lines, and has a T line at the intersection point, for example.
A TFT array (8) in which an active element such as P T f41 is formed and has a drain voltage tili f31 , a display electrode (5), and a signal storage capacitor (6).
A T″FTFT array substrate formed with , a transparent conductive film 11Q facing it, and color filters σ of red, green, blue, etc.
υ.

を有する対向基板L13及びこの側基板19ン、α2の
間に液晶(7)が挾持された構造となっている。
It has a structure in which a liquid crystal (7) is sandwiched between a counter substrate L13 having a side substrate L13 and a side substrate 19, α2.

ひき続き、従来のTFTアレイ(8)を第3図、第4図
により説明する。TPTアレ゛イ(8)はガラス等の絶
縁基板よりなるTFTアレイ基板(91の表面に、ゲー
ト線il+となるμ等を例えば蒸着法等で肢成し、その
上部にゲート絶縁attoとなる8102等を例えばス
パッター法等で形成、更にソース線(2)。
Next, the conventional TFT array (8) will be explained with reference to FIGS. 3 and 4. The TPT array (8) is a TFT array substrate (91) made of an insulating substrate such as glass, on the surface of which μ, etc., which serve as gate lines il+, are formed by, for example, vapor deposition, and on top of which μ, etc., which serve as gate insulating atto, are formed. A source line (2) is formed by, for example, a sputtering method.

ドレイン電極13)となるμ等を例えば蒸着法等で形成
した後に半導体α尋となる例えばア□モルファスシリコ
ン等を、/ラズマOVD法等で形成してTF’(4)を
設置する。この後蓄積コンデンサー(6)を例えば蓄積
コンデンサー磁極(151となるIn2O3等を蒸着法
等で形成した後、誘電体罰として例えば5i02等をス
パッター法等で形成し1表示電極(5)、及び蓄積コン
デンサーの上部電極を兼ねる。例えばIn2O3を例え
ば蒸着法等で形成し、その一端を先に形成したドレイン
電極(3)に接続してTFTアレイ(8)が完成する。
After μ, etc., which will become the drain electrode 13), are formed by, for example, vapor deposition, a semiconductor α, such as amorphous silicon, is formed by /lasma OVD, etc., and TF' (4) is installed. After this, the storage capacitor (6) is formed by, for example, In2O3, which becomes the storage capacitor magnetic pole (151), by a vapor deposition method, and then, as a dielectric material, for example, 5i02, etc. is formed by a sputtering method, and the display electrode (5) and the storage capacitor are formed. For example, In2O3 is formed by a vapor deposition method, and one end thereof is connected to the previously formed drain electrode (3) to complete the TFT array (8).

ところでマトリクス型液晶表示にもちいるTFTアレイ
に要求される特性は、’I’FTのOFF時のドL/(
ン4流、  (ID3(OFF’) ) トON時の電
流(ID8 (ON))との比ID5(ON)イDs(
OFF)が103以上必要であり、父TFTの感度、利
得を示す相互コンダクタンス(gm )が大きいことが
必要である。
By the way, the characteristics required of a TFT array used in a matrix type liquid crystal display are the do L/(
4 current (ID3(OFF')) Ratio of current (ID8 (ON)) when ON (ID5(ON))
OFF) is required to be 103 or more, and it is necessary that the transconductance (gm), which indicates the sensitivity and gain of the parent TFT, be large.

ここで、約soo”cd下の低温プロセスで形成可能な
半導体1例えばアモルファス、シリコンをもちいたTP
T等ではこの半導体とゲート絶縁膜との界面近傍におけ
る。半導体中のキャリヤーの電界効果移動度(−)が、
この半導体に例えば単結晶シリコン等を使用した場合に
比し、極めて小さく(例えば0.5 cd / 1se
c以下)液晶を駆動するに必要な゛電圧(電流)を得る
ことが困難であり、橋めて大型(ゲート4/1−43比
の大きな)、かつ大面積のTPTの形成が必要となり1
例えば第3図に示した大型のTF’rと小さな表示電極
の構成となる。
Here, a semiconductor 1 that can be formed by a low-temperature process below about so"cd, such as amorphous, TP using silicon, etc.
In T, etc., this occurs near the interface between the semiconductor and the gate insulating film. The field effect mobility (-) of carriers in a semiconductor is
Compared to the case where, for example, single crystal silicon is used for this semiconductor, it is extremely small (for example, 0.5 cd / 1 se
c) It is difficult to obtain the voltage (current) necessary to drive the liquid crystal, and it is necessary to form a large TPT (with a large gate ratio of 4/1-43) and a large area.
For example, the structure has a large TF'r and a small display electrode as shown in FIG.

一方マトリゲス型液晶表示等の画像表示では。On the other hand, in image displays such as matrix-type liquid crystal displays.

その解像度の制約から単位画素の最大寸法は、約300
ミクロンメートルOy下程度に小さくする必要がある。
Due to resolution constraints, the maximum size of a unit pixel is approximately 300
It is necessary to make the size smaller than micrometer Oy.

以上に説明したように、従来例ではマトリクス型液晶表
示において1通常表示上欠陥となるTPTの設置面積が
大きくなり1表示電極の設置面積が減少する結果1表示
性能の目安となる単位画素面積に占める表示4[面積の
比、すなわち開口率(以下開口率と称する)が低下する
と共に比較的大容量を必要とする信号蓄積コンデンサー
の形成可能面積等が低下し、良好な表示性能を有するマ
トリクス型液晶表示装置が得られないといった欠点があ
った。
As explained above, in the conventional matrix type liquid crystal display, the installation area of TPT, which is a defect in normal display, becomes large, and the installation area of display electrodes decreases, resulting in a decrease in unit pixel area, which is a measure of display performance. Display 4 [matrix type, which has good display performance because the area ratio, that is, the aperture ratio (hereinafter referred to as aperture ratio) is reduced, and the area where a signal storage capacitor, which requires a relatively large capacity, can be formed is reduced. The drawback was that a liquid crystal display device could not be obtained.

こ・の発明は1述のような従来のものの欠点な除去する
ためになされたもので、マトリクス型液晶表示装置等に
もちいるTFTアレイにおいて、ゲート電極、及び蓄積
コンデンサー電極の構成材料にμをもちい、この表面を
陽極酸化して、ゲート絶縁膜及び蓄積コンデンサーの誘
電体とすることを特徴としている。
This invention was made to eliminate the drawbacks of the conventional ones as mentioned in 1. In TFT arrays used in matrix type liquid crystal display devices, etc., μ is added to the constituent materials of gate electrodes and storage capacitor electrodes. It is characterized in that this surface is anodized and used as the gate insulating film and the dielectric of the storage capacitor.

以下この発明の一実施例を第5図、第6図C二より説明
する。第5図は本発明のTFTアレイ画素の部分平面図
、。第6図は第5図のA −A’部の断面構造図を示し
ている。図において、(1)はゲート線(2)はソース
線、(3)はドレイン電極、(5)は表示電極、(81
はTFTアレイ、(9)はTFTアレイ基板、α4は半
導体、(1りは蓄積コンデンサー電極、(ll19はゲ
ート絶縁膜1面は誘電体を示している。
An embodiment of the present invention will be described below with reference to FIG. 5 and FIG. 6 C-2. FIG. 5 is a partial plan view of a TFT array pixel of the present invention. FIG. 6 shows a cross-sectional structural view taken along the line A-A' in FIG. In the figure, (1) is a gate line, (2) is a source line, (3) is a drain electrode, (5) is a display electrode, and (81) is a source line.
(9) is a TFT array, (9) is a TFT array substrate, α4 is a semiconductor, (1 is a storage capacitor electrode, and (119 is a gate insulating film 1 side is a dielectric material.

ひき続きその構成を説明する。TFTアレイ(81はガ
ラス等の透明絶縁基板よりなるTFTアレイ基板(9)
の表面に、まずゲート線(1)、及び蓄積コンデンサー
電極σSとなるμを例えば蒸着法等で形成り、’7’−
)線(11及び蓄積コンデン疹−電極αSを陽橿r:、
−例えば2〜3%の硼酸アンモニウム溶液で、電流密度
1mA /cd、 200 Vで化成、陽極酸化膜A1
20Bを形成しゲート絶縁膜αe、及び蓄積コンデンサ
ーの誘電体aηとする。この後表示電極15)と蓄積コ
ンデンサーの上部電極を兼ねる。例えば工nzom等の
透明導電膜を蒸着法等で形成1次いでソース線(2)、
及びドレイン電極(3)となる例えばμ等を蒸着法等で
形成し、先に形成した表示電極(5)の一端に接続スる
。この後アモルファスシリコン等の半導体Iを例えばプ
ラズマOVD法等で形成・設置してTFTアレイf8)
が完成する。
Next, I will explain its structure. TFT array (81 is a TFT array substrate (9) made of a transparent insulating substrate such as glass)
First, a gate line (1) and μ, which will become the storage capacitor electrode σS, are formed on the surface of the '7'-
) line (11 and accumulated condensation - positive electrode αS:,
-For example, chemically form the anodic oxide film A1 with a 2-3% ammonium borate solution at a current density of 1 mA/cd and 200 V.
20B is formed to serve as the gate insulating film αe and the dielectric material aη of the storage capacitor. After that, it serves as the display electrode 15) and the upper electrode of the storage capacitor. For example, a transparent conductive film such as ZOM is formed by a vapor deposition method, etc. 1. Then, a source line (2),
A layer such as μ, which will become the drain electrode (3), is formed by vapor deposition or the like, and connected to one end of the previously formed display electrode (5). After this, a semiconductor I such as amorphous silicon is formed and installed by, for example, plasma OVD method, and a TFT array f8) is formed.
is completed.

本発明によるTFTアレイは以上のように、ゲ  4−
ト絶縁膜及び蓄積コンデンサーの誘電体が、それぞれ、
ゲート電極、及び蓄積コンデンサー電極を構成するμを
陽極酸化法でその表面を酸化し。
As described above, the TFT array according to the present invention has a gate 4-
The insulating film and the dielectric of the storage capacitor are respectively
The surface of μ, which constitutes the gate electrode and storage capacitor electrode, is oxidized using an anodic oxidation method.

Al!O3よりなる絶縁被膜を形成した。安定な酸化1
11A1zosは誘電率が大きく、約7.4〜7.6の
値を有し、従来法の例でもちいた81oz、 (誘電率
は3゛1・ −4)等に比較して極めて大きい。このことはTPTの
性能指数(”’ / i−’4、)(ここで声は、キャ
リヤーの移動度、Cは誘電率、tはゲート絶縁膜の膜厚
、Wはゲート幅、Lはゲート長。)から明らかなように
、TPTのON時の電流、及び相互コンダクタンスgm
が増大し、TPTの性能が向上する結果、従来法の例等
に比較してより小さい、かつ高性能なTPTに置換でき
ることを示している。父、液晶を駆動するためI:比較
的大容量を必要とする蓄積コンデンサーの単位面積当り
の容量も父増加し、従来法の例等に比較してより小さい
形成面積でよいことを示している。
Al! An insulating film made of O3 was formed. Stable oxidation 1
11A1zos has a large dielectric constant of about 7.4 to 7.6, which is extremely large compared to 81 oz (dielectric constant of 3.1.-4) used in the conventional method. This means that the figure of merit of TPT is (''/i-'4,) (where the voice is the carrier mobility, C is the dielectric constant, t is the thickness of the gate insulating film, W is the gate width, and L is the gate ), the current when the TPT is ON and the mutual conductance gm
This shows that as a result of the increase in TPT performance and the improvement in TPT performance, it is possible to replace the TPT with a smaller and higher performance TPT compared to conventional methods. The capacitance per unit area of the storage capacitor, which requires a relatively large capacity to drive the liquid crystal, has also increased, indicating that it can be formed in a smaller area compared to conventional methods. .

一方マトリクス型液晶表示等の画像表示ではその解像度
の制約から単位画素の最大寸法は、約300ミクロンメ
ートル 以下程度に小さくする必要がある。
On the other hand, in an image display such as a matrix type liquid crystal display, the maximum dimension of a unit pixel must be reduced to about 300 micrometers or less due to resolution constraints.

以上に説明したように1本発明によればTPT等能動素
子の設置面積が小さく1表示電極の設置面積が増大でき
る結果1表示性能の目安となる開口率が増大できると共
l二、蓄積コンデンサーが小:り1 面積で形成可能となり、良好な表示品質を有するマトリ
クス型液晶表示装置が得られる。父、低温プロセスで製
造−できるので安価なガラス基板等の使用が可能となり
、大画面のマ)IJクス型液晶表示装置が得られる効果
がある。
As explained above, (1) according to the present invention, the installation area of active elements such as TPT is small, (1) the installation area of display electrodes can be increased, (1) the aperture ratio, which is a measure of display performance, can be increased, and (2) the storage capacitor It is possible to form a matrix type liquid crystal display device with a small area of 1.0 mm, and a matrix type liquid crystal display device with good display quality can be obtained. Furthermore, since it can be manufactured using a low-temperature process, it is possible to use inexpensive glass substrates, etc., and there is an effect that a large-screen MAJ type liquid crystal display device can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

111図はTFTアレイの構成を説明するための図、1
2図はマトリクス型液晶表示装置の断面構造図、第3図
は従来のでFTアレイ画素の部分平面図、第4図は第3
図A −A’部の断面構造図、第5図は本発明のTPT
プレイ画素の部分平面図。 第6図は第5図A −A’部の断面構造図である。 図中、11)はゲート線、αりは蓄積コンデンサー峨極
、aeはゲート絶縁膜、αηは誘電体である。 なお1図中同一行合は同−又は相当部分を示している。 代理人 葛野信− 第1図 第3図 第4図 第5図 第6図
Figure 111 is a diagram for explaining the configuration of the TFT array, 1
Figure 2 is a cross-sectional structural diagram of a matrix type liquid crystal display device, Figure 3 is a partial plan view of a conventional FT array pixel, and Figure 4 is a partial plan view of a conventional FT array pixel.
Figure A-A' section cross-sectional structure diagram, Figure 5 is the TPT of the present invention.
A partial plan view of a play pixel. FIG. 6 is a cross-sectional structural diagram of the section A-A' in FIG. 5. In the figure, 11) is a gate line, α is a storage capacitor electrode, ae is a gate insulating film, and αη is a dielectric. Note that the same lines in Figure 1 indicate the same or equivalent parts. Agent Makoto Kuzuno - Figure 1 Figure 3 Figure 4 Figure 5 Figure 6

Claims (1)

【特許請求の範囲】 複数個のゲート線、及びゲート線に直交する複数個のソ
ース線を備え、その交点に薄膜トランジスタ(以下TP
Tと称する)等の能動素子及び信号蓄積コンデンサー等
よりなるTFTアレイを形成した基板と、透明導電膜、
及び赤、緑、青等のカラーフィルタ等を形成した対向基
板とを有し。 前記側基板間に液晶を挾持した構造のマトリクス型液晶
表示装置において、TFTアレイのゲート電橋、及び蓄
積コンデンサー電極材料が紅、ゲート絶縁膜、及び蓄積
コンデンサーの誘電体がAl2O2よりなることを特徴
としたTFTアレイ等の半導体装置、及びマトリクス型
液晶表示装置。
[Claims] A plurality of gate lines and a plurality of source lines perpendicular to the gate lines are provided, and a thin film transistor (hereinafter referred to as TP) is provided at the intersection point of the gate lines.
A substrate on which a TFT array consisting of active elements (referred to as T) and signal storage capacitors, etc., a transparent conductive film,
and a counter substrate on which color filters of red, green, blue, etc. are formed. In the matrix type liquid crystal display device having a structure in which liquid crystal is sandwiched between the side substrates, the gate bridge of the TFT array and the storage capacitor electrode material are made of red, and the gate insulating film and the dielectric of the storage capacitor are made of Al2O2. semiconductor devices such as TFT arrays, and matrix-type liquid crystal display devices.
JP56193528A 1981-11-28 1981-11-28 Matrix type liquid crystal display Pending JPS5893092A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56193528A JPS5893092A (en) 1981-11-28 1981-11-28 Matrix type liquid crystal display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56193528A JPS5893092A (en) 1981-11-28 1981-11-28 Matrix type liquid crystal display

Publications (1)

Publication Number Publication Date
JPS5893092A true JPS5893092A (en) 1983-06-02

Family

ID=16309566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56193528A Pending JPS5893092A (en) 1981-11-28 1981-11-28 Matrix type liquid crystal display

Country Status (1)

Country Link
JP (1) JPS5893092A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6414345B1 (en) 1994-06-13 2002-07-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including active matrix circuit
US6979840B1 (en) 1991-09-25 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having anodized metal film between the gate wiring and drain wiring

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6979840B1 (en) 1991-09-25 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having anodized metal film between the gate wiring and drain wiring
US7642584B2 (en) 1991-09-25 2010-01-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
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