JP2687967B2 - Liquid crystal display - Google Patents
Liquid crystal displayInfo
- Publication number
- JP2687967B2 JP2687967B2 JP25322790A JP25322790A JP2687967B2 JP 2687967 B2 JP2687967 B2 JP 2687967B2 JP 25322790 A JP25322790 A JP 25322790A JP 25322790 A JP25322790 A JP 25322790A JP 2687967 B2 JP2687967 B2 JP 2687967B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- liquid crystal
- conductive thin
- substrate
- static electricity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は液晶表示装置の構造に関するものである。The present invention relates to the structure of a liquid crystal display device.
従来の技術 近年、微細加工技術と液晶材料の進歩により、液晶パ
ネルを用いたテレビ画像表示装置が商用ベースで提供さ
れるようになってきた。また、方式としては絵素毎にス
イッチング素子を内蔵させた、いわゆるアクティブ方式
が、高コントラスト、高解像度等の利点から主流になり
つつある。2. Description of the Related Art In recent years, due to advances in fine processing technology and liquid crystal materials, television image display devices using liquid crystal panels have been provided on a commercial basis. Further, as a method, a so-called active method in which a switching element is built in for each picture element is becoming mainstream because of advantages such as high contrast and high resolution.
第3図はアクティブ型の液晶パネルの等価回路を示し
たもので、走査線群2と信号線群3との交差点毎に、例
えば電界効果型トランジスタのスイッチ素子4と、液晶
セル5が配置されている。6は全ての液晶セル5に共通
した透明導電層よりなる対向電極である。FIG. 3 shows an equivalent circuit of an active liquid crystal panel. For example, a switching element 4 of a field effect transistor and a liquid crystal cell 5 are arranged at each intersection of the scanning line group 2 and the signal line group 3. ing. Reference numeral 6 is a counter electrode formed of a transparent conductive layer common to all liquid crystal cells 5.
第4図は一般的なアクティブ方式の単位絵素あたりの
平面図であり、同図A−A′線の断面図を第5図に示
す。絶縁性基板1、例えば、ガラス基板1上に、走査線
と電界効果型トランジスタのゲートを兼ねる導電層8を
形成し、絶縁層13を介して非晶質シリコン層12及び信号
線9とドレイン配線10を形成し、電界効果型トランジス
タを形成する。ここで、7は絵素電極、11はコンタクト
部を示す。FIG. 4 is a plan view of a unit pixel of a general active system, and FIG. 5 is a sectional view taken along the line AA ′ in FIG. On the insulating substrate 1, for example, the glass substrate 1, the conductive layer 8 which also serves as the scanning line and the gate of the field effect transistor is formed, and the amorphous silicon layer 12 and the signal line 9 and the drain wiring are provided through the insulating layer 13. 10 is formed to form a field effect transistor. Here, 7 is a pixel electrode, and 11 is a contact part.
発明が解決しようとする課題 しかしながら上記の様な構成では、構造が複雑なため
歩留りが低いという問題を有している。この低歩留りの
最大の原因に絶縁層13の絶縁不良、例えば、走査線8
と、信号線9との間のショート不良がある。この不良は
画像上においてクロス線欠陥となり、表示品質を著しく
低下させ、実用上大きな問題となる。However, the above-mentioned structure has a problem that the yield is low because the structure is complicated. The greatest cause of this low yield is insulation failure of the insulating layer 13, such as the scan line 8
There is a short circuit between the signal line 9 and the signal line 9. This defect becomes a cross line defect on the image, which significantly deteriorates the display quality, which is a serious problem in practical use.
このショート不良の発生する原因の一つに静電気によ
る絶縁破壊があげられる。これは絶縁性基板1の外部か
ら、走査線群2あるいは信号線群3への静電気の侵入に
より、走査線8と信号線9の間に電位差を生じ、それが
絶縁層13の電気的耐圧を越えた場合に、絶縁破壊を起こ
し、走査線8と信号線9のショート不良となるものであ
る。One of the causes of this short circuit failure is dielectric breakdown due to static electricity. This is because static electricity invades the scanning line group 2 or the signal line group 3 from the outside of the insulating substrate 1 to cause a potential difference between the scanning line 8 and the signal line 9, which causes the electrical breakdown voltage of the insulating layer 13. If it exceeds, dielectric breakdown occurs, resulting in a short circuit defect between the scanning line 8 and the signal line 9.
この絶縁破壊によるショート不良を防止するために
は、製造工程における徹底的な除電や、取扱い上の細心
の注意が必要となる。しかしながら上記対策を実施して
も、前記ショート不良の発生率を小さくすることはでき
るが、根本的対策とはなり得ないという問題点があっ
た。そのために、走査線群2と信号群3とを導電性薄膜
パタンによりショートすることにより、前記走査線と前
記信号線との間の電位差を発生させない根本対策が必要
となる。In order to prevent short-circuit defects due to this dielectric breakdown, thorough static elimination in the manufacturing process and careful handling are required. However, even if the above measures are taken, the occurrence rate of the short circuit defect can be reduced, but there is a problem that it cannot be a fundamental measure. Therefore, it is necessary to take a fundamental measure to prevent the potential difference between the scanning line and the signal line from occurring by short-circuiting the scanning line group 2 and the signal group 3 with the conductive thin film pattern.
しかしながら、前記導電性薄膜ショートパタンは液晶
表示装置の画像表示の際に正常な画像を得るため、画像
表示以前の工程にてエッチングあるいは切断により除去
せねばならないために、工数の増加による歩留りの低減
という問題や、エッチングや切断による信頼性の低下と
いう問題を有していた。However, since the conductive thin film short pattern has to be removed by etching or cutting in a process before displaying an image in order to obtain a normal image when displaying an image on a liquid crystal display device, a reduction in yield due to an increase in man-hours. However, there is a problem that reliability is deteriorated by etching and cutting.
本発明は上記課題に鑑み、工数の増加および信頼性を
低下させることなく、静電気入力時の絶縁層を介した2
層の導電性薄膜配線間における絶縁層の絶縁破壊による
ショート不良を防止する構造を有する液晶表示装置を提
供するものである。In view of the above-mentioned problems, the present invention uses an insulating layer at the time of static electricity input without increasing the number of steps and reducing the reliability.
Provided is a liquid crystal display device having a structure for preventing a short circuit defect due to dielectric breakdown of an insulating layer between conductive thin film wirings of a layer.
課題を解決するための手段 本発明は、静電気入力時の2層の導電性薄膜配線間に
介された絶縁層の絶縁破壊によるショート不良を防止す
るため、一対の基板間に液晶が封入され、前記一方の基
板上にマトリクス状に配列された画素電極と、前記画素
電極に近接して接続されてなる薄膜トランジスタと、前
記薄膜トランジスタのソース電極に接続されてなる信号
配線と、前記薄膜トランジスタのゲート電極に接続され
てなる走査配線を有する液晶表示装置であり、前記基板
の内面で前記信号配線と前記走査配線のいずれにも電気
的に接続されていない部分に第1の導電性薄膜を形成
し、その上に絶縁層を介して前記第1の導電性薄膜のパ
ターンに重なるように第2の導電性薄膜を形成したこと
を特徴とする液晶表示装置としたものである。Means for Solving the Problems According to the present invention, liquid crystal is sealed between a pair of substrates in order to prevent short-circuit defects due to dielectric breakdown of an insulating layer interposed between two layers of conductive thin film wiring during static electricity input. Pixel electrodes arranged in a matrix on the one substrate, a thin film transistor connected in proximity to the pixel electrode, a signal line connected to the source electrode of the thin film transistor, and a gate electrode of the thin film transistor. A liquid crystal display device having scan wirings connected to each other, wherein a first conductive thin film is formed on a portion of the inner surface of the substrate which is not electrically connected to either the signal wirings or the scan wirings. A liquid crystal display device is characterized in that a second conductive thin film is formed thereon so as to overlap the pattern of the first conductive thin film via an insulating layer.
作用 本発明は上記した構成により、基板の外部から静電気
が印加された場合に、基板外周を囲むように形成された
帯状導電性薄膜パタンにより静電気が分散され、静電気
の極部的集中による配線間の絶縁破壊によるショート不
良を防ぐことができる。また、2層以上の帯状導電性薄
膜パタンが容量を形成することにより、基板へ外部から
静電気が印加された場合に、絶縁層を介した2層以上の
帯状導電性薄膜パタンにより構成された容量に蓄積され
た電荷により、静電気を打ち消す、あるいは帯状導電性
薄膜パタン間に先に絶縁破壊を起こさせることにより静
電気の配線間への侵入による絶縁破壊を防止することが
できる。The present invention has the above-described structure, and when static electricity is applied from the outside of the substrate, the static electricity is dispersed by the strip-shaped conductive thin film pattern formed so as to surround the outer periphery of the substrate, and the static electricity is locally concentrated between the wirings. It is possible to prevent short circuit defects due to dielectric breakdown. In addition, when two or more layers of the strip-shaped conductive thin film pattern form a capacitance, the capacitance formed by the two or more layers of the strip-shaped conductive thin film pattern through the insulating layer when static electricity is externally applied to the substrate. It is possible to prevent static electricity from being canceled by static electricity due to the charge accumulated in the wiring, or to cause dielectric breakdown between the strip-shaped conductive thin film patterns in advance to prevent dielectric breakdown due to invasion of static electricity between wirings.
実施例 第1図(a),(b)は本発明の一実施例によるアク
ティブ型液晶パネルの斜視図であり、第1図(a),
(b)のB−B′線の断面図を第2図に示す。Embodiments FIGS. 1 (a) and 1 (b) are perspective views of an active type liquid crystal panel according to an embodiment of the present invention.
FIG. 2 is a sectional view taken along line BB ′ of FIG.
まず、第1図(a)に示す様にアクティブ型液晶パネ
ルの形成されている基板1の内面で前記信号配線と前記
走査配線のいずれにも電気的に接続されていない部分に
第1の導電性薄膜14を帯状に形成する。この上に第2図
の様に絶縁層16を被着後、第1の導電性薄膜パタン14と
重なる様に第2の導電性薄膜パタン15を形成する。この
時、第1の導電性薄膜パタン14および第2の導電性薄膜
パタン15は第1図(a)の様に完全な帯状であっても良
いし、第1図(b)の様に2本の導電性薄膜パタンの片
方にあるいは両方が途中で切れている帯状であっても良
い。なお、導電性薄膜パタン14と導電性薄膜パタン15と
の重なりは、パタン全部である必要はなく、そのパタン
の一部であれば良い。First, as shown in FIG. 1 (a), the first conductive layer is formed on the inner surface of the substrate 1 on which the active liquid crystal panel is formed and which is not electrically connected to either the signal wiring or the scanning wiring. The thin film 14 is formed into a strip shape. After depositing an insulating layer 16 thereon as shown in FIG. 2, a second conductive thin film pattern 15 is formed so as to overlap the first conductive thin film pattern 14. At this time, the first conductive thin film pattern 14 and the second conductive thin film pattern 15 may have a perfect strip shape as shown in FIG. 1 (a), or as shown in FIG. 1 (b). The conductive thin film pattern of the book may have a strip shape in which one or both of them are cut in the middle. Note that the conductive thin film pattern 14 and the conductive thin film pattern 15 do not have to overlap the entire pattern, and may be a part of the pattern.
また、例えば、走査線8の形成時に導電性薄膜パタン
14を形成し、信号線9の形成時に導電性薄膜パタン15を
形成する様にすれば、工数の増加はなく、歩留りの低下
につながることもない。In addition, for example, when forming the scanning line 8, a conductive thin film pattern is formed.
If 14 is formed and the conductive thin film pattern 15 is formed when the signal line 9 is formed, the number of steps is not increased and the yield is not reduced.
以上のように本実施例によれば、絶縁性基板1の外部
より静電気が印加された場合、第1,第2の導電性薄膜パ
タン14,15の帯状の形状により静電気が分散され、静電
気の極部印加による、例えば、走査線2と信号線3のク
ロス部の絶縁破壊によるショート不良を防止することが
できる。また、第1,第2の導電性薄膜パタン14,15によ
り構成された容量に蓄積された電荷により、絶縁性基板
1の外部より印加された静電気を打ち消し、静電気の配
線2,3への侵入を防ぐことができる。As described above, according to this embodiment, when static electricity is applied from the outside of the insulating substrate 1, the static electricity is dispersed due to the strip-shaped shapes of the first and second conductive thin film patterns 14 and 15, and It is possible to prevent a short circuit defect due to the dielectric breakdown of the cross portion of the scanning line 2 and the signal line 3 due to the application of the pole portion. In addition, static electricity applied from the outside of the insulating substrate 1 is canceled by the electric charge accumulated in the capacitance formed by the first and second conductive thin film patterns 14 and 15, and the static electricity enters the wirings 2 and 3. Can be prevented.
発明の効果 以上説明したように本発明によれば、アクティブ型液
晶パネル基板への外部からの配線への静電気の侵入を防
止することができ、ショート不良の発生が飛躍的に低減
され、その実用的効果は大なるものがある。EFFECTS OF THE INVENTION As described above, according to the present invention, it is possible to prevent static electricity from invading the wiring from the outside to the active type liquid crystal panel substrate, and the occurrence of short circuit defects is dramatically reduced. There is a great effect.
第1図(a),(b)は本発明の実施例にかかるアクテ
ィブ型液晶パネルの斜視図、第2図は第1図(a),
(b)のB−B′線の断面図、第3図は従来例のアクテ
ィブ型液晶パネルの斜視図、第4図は同液晶パネルの単
位絵素あたりの平面図、第5図は第4図のA−A′線の
断面図である。 1……絶縁性基板、14,15……第1,第2の導電性薄膜、1
6……絶縁層。1 (a) and 1 (b) are perspective views of an active type liquid crystal panel according to an embodiment of the present invention, and FIG. 2 is FIG. 1 (a),
FIG. 4B is a cross-sectional view taken along line BB ′ of FIG. 3B, FIG. 3 is a perspective view of a conventional active type liquid crystal panel, FIG. 4 is a plan view of a unit pixel of the liquid crystal panel, and FIG. It is sectional drawing of the AA 'line of a figure. 1 ... Insulating substrate, 14, 15 ... First and second conductive thin film, 1
6 ... Insulating layer.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 大友 哲哉 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (56)参考文献 特開 昭63−274930(JP,A) 特開 昭62−264027(JP,A) 特開 昭63−25683(JP,A) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tetsuya Otomo 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) Reference JP 63-274930 (JP, A) JP 62- 264027 (JP, A) JP-A-63-25683 (JP, A)
Claims (1)
の基板上にマトリクス状に配列された画素電極と、前記
画素電極に近接して接続されてなる薄膜トランジスタ
と、前記薄膜トランジスタのソース電極に接続されてな
る信号配線と、前記薄膜トランジスタのゲート電極に接
続されてなる走査配線を有する液晶表示装置であり、前
記基板の内面で前記信号配線と前記走査配線のいずれに
も電気的に接続されていない部分に第1の導電性薄膜を
形成し、その上に絶縁層を介して前記第1の導電性薄膜
のパターンに重なるように第2の導電性薄膜を形成した
ことを特徴とする液晶表示装置。1. A liquid crystal is sealed between a pair of substrates, pixel electrodes arranged in a matrix on the one substrate, a thin film transistor formed in close proximity to the pixel electrode, and a source electrode of the thin film transistor. A liquid crystal display device having a signal wiring connected to the scanning line and a scanning wiring connected to the gate electrode of the thin film transistor, and electrically connected to both the signal wiring and the scanning wiring on the inner surface of the substrate. A liquid crystal, characterized in that a first conductive thin film is formed on a non-exposed portion, and a second conductive thin film is formed on the first conductive thin film so as to overlap the pattern of the first conductive thin film via an insulating layer. Display device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25322790A JP2687967B2 (en) | 1990-09-21 | 1990-09-21 | Liquid crystal display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25322790A JP2687967B2 (en) | 1990-09-21 | 1990-09-21 | Liquid crystal display |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04130417A JPH04130417A (en) | 1992-05-01 |
JP2687967B2 true JP2687967B2 (en) | 1997-12-08 |
Family
ID=17248339
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25322790A Expired - Fee Related JP2687967B2 (en) | 1990-09-21 | 1990-09-21 | Liquid crystal display |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2687967B2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6268895B1 (en) | 1995-10-27 | 2001-07-31 | Sharp Kabushiki Kaisha | Liquid crystal display device having light shield in periphery of display |
JPH10268794A (en) | 1997-03-26 | 1998-10-09 | Sharp Corp | Display panel |
JP2003043511A (en) * | 2001-08-01 | 2003-02-13 | Toshiba Corp | Electrode substrate for display device, and liquid crystal display device |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0727138B2 (en) * | 1986-01-16 | 1995-03-29 | 日本電装株式会社 | Liquid crystal display element manufacturing method |
JPS6325683A (en) * | 1986-07-18 | 1988-02-03 | 松下電器産業株式会社 | Shielding apparatus for liquid crystal panel |
JP2615615B2 (en) * | 1987-05-06 | 1997-06-04 | セイコーエプソン株式会社 | Active matrix liquid crystal panel |
-
1990
- 1990-09-21 JP JP25322790A patent/JP2687967B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH04130417A (en) | 1992-05-01 |
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