JPS5891644A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS5891644A
JPS5891644A JP56188439A JP18843981A JPS5891644A JP S5891644 A JPS5891644 A JP S5891644A JP 56188439 A JP56188439 A JP 56188439A JP 18843981 A JP18843981 A JP 18843981A JP S5891644 A JPS5891644 A JP S5891644A
Authority
JP
Japan
Prior art keywords
silicon
layer
metal
sapphire
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56188439A
Other languages
English (en)
Inventor
Takao Fujizu
隆夫 藤津
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56188439A priority Critical patent/JPS5891644A/ja
Publication of JPS5891644A publication Critical patent/JPS5891644A/ja
Pending legal-status Critical Current

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  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 発明の技術分野 シリコンオンサファイア（８０８と略称する）構造の半
導体素子のマウント構造の改良に関する。
発明の技術的背景 ＳＯＳ構造の半導体装置の一例を第１図および第２図（
第２図は第１図のリード端子−，（１０’）・・・を省
略して示す）に示す。この構造は基板が絶縁物のため、
寄生効果が極めて少く、素子の高速化および高集積化に
適するので多く用いられるようＫなっている。図におい
て、（１）はサファイア基板で一方の主面にシリコンの
活性領域が形成されて半導体素子（２）が構成されてい
る。そして、この素子はセラ建ツクスの外囲器（３１）
に合成樹脂の接着剤層（４）を介して加熱接着されたの
ち、素子の電極がワイヤメンディング（（５）、（５’
）・・・はボンディングワイヤ）によって導出され、外
囲器のふた体（３ｂ）で封止されていた。前記！ラン）
Ｋあた夛、基板がサファイアであるため、例えばエポキ
シ、樹脂系接着剤によっていた。このような接着剤は一
般に加熱を施して接着が達成されるが、その接着強度が
低調であるためサファイアの接着面を粗面化させた）、
さらに接着強度の高い接着剤を選択していた。
背景技術の問題点 エポキシ樹脂のような熱硬化性の合成樹脂を用いる場合
のキエアによって発生するガスが素子の表面に耐着し、
あるいはパッケージ内に残存し信頼性を低下させる丸め
、マウント後に洗浄を施す必要があった。を九、取着強
度が低いのでキュアＯ温度管理が難かしく、表面を粗面
化する必要があって製造ニーが繁雑になったシ種々の問
題があつた。
発明の目的 ＳＯＳ構造の半導体装置における半導体素子のマウント
強度を改善する構造を提供する。
発明の概要（構成と作用） サファイア基板の亀山側主面を金属層または金属とシリ
コンの共晶層を介して外囲器に固着させることにより、
マウント強度を向上させる構造である。
発明の実施例 発明の第１の実施例 構造の１例は第３図に示されるように、サファイア基板
（１）の接着側主面に気相成長によってシリコン層、ま
たはポリシリコン層Ｑｌ）を形成し、これらがサファイ
ア基板との反応性も高く、高純度のシリコンであるため
素子形成プロセスでの金属原子による汚染もない。叙上
のシリコン層は外囲器（内面のメタライズ層に設けられ
た金層、“まえは金シリコン共晶層に金シリコン共晶を
形成させて加熱と機械的応力を印加して固着させ、ある
いは前記メタライズ層との間に金箔または金シリコン箔
を挿んで加熱と機械的応力を印加して固着させる。
いずれにしても、サファイア基板側からシリコン（ｔた
はポリシリコン）層ａυ、金シリコン層ａ２、（金層（
上記金属または金箔でシリコンと共晶生成しなかった部
分））、メタライズ層０の順に相互に強固な結合をもっ
てサファイア基板（１）が外囲器（３ｍ）の内面に固着
されるものである。
叙上の構造によ６、ｓｏｓ構造の紫子チレプがきわめて
高い信頼性でマウントされるので、シリコン基板で形成
された素子チップと同様の容易さと信頼性が得られ、か
つ、マウント時における加熱によるガス放出も極微で素
子を汚染しない利点がある。
発明の第２の実施例 構造の一例が第３図に示されるように、サファイア基板
（１）の接着側主面が粗面化され、これにタングステン
、チタン、モｌＪ７’テン、ニクロム、バナジウム等か
ら選ばれた金゛属（合金）を蒸着し加熱を施して第１の
メタライズ層間を２００〜３００Ｘの層厚に形成し、さ
らに、はんだと接合のよいニッケル郷の第２のメタライ
ズ層（２）を３ｏｏｏＸの層厚に積層して形成し、この
層と外囲器のメタ２イズ層Ｉとの間を鉛すず−はんだ、
金すず−はんだ等のけんだ接合層（至）で接続して、外
囲器Ｋ　１１ｍ１ｔ着させる。
なお、前記第２のメタ２イズ鳩４？ｌＦ着後に表面の酸
化防止の友め薄く金を蒸着しておいてはんだ接合を容易
かつ鎗実にした。また、第１のメタライズ層は素子に形
成される前のす７了イア基板に蒸着形成し、加熱シンタ
ーを施しておいて４よい。
＠明の効果 半導体チップと外囲器との接合が金属層（−例の金すず
）または金層とシリコンとの共晶層によって達成される
ので、きわめて伽固な接着が達成されるとともに１接着
時に従来の合成棚側のようなガス放出がないため素子が
汚染される仁とがないなどの顕著な利点がある。
【図面の簡単な説明】
第１図社従来の半導体装置の腑視図、第２図は第１図の
半導体装置のリード端子を除いて示す断面図、第３図は
１実施例の半導体装置のリード端子を除いて示す断面図
、第４図は別の実施例の半導体装置のリード端子を除い
て示す断面図である。 １　　　　　サファイア基板 ２　　　　　半導体素子 ３ａ　　　　　　セラミックスの外囲器３ｂ　　　　　
外囲器のふた体 ５．５′　　　　　ボンディングワイヤ１０．１０’・
・・　　リード端子 １１　　　　　　　シリコン（ま九はポリシリコン）層
１２　　　　　　金シリコン共晶層 １３　　　　　　外囲器のメタライズ層２１　　　　　
　第１のメタライズ層 ２２　　　　　　第２のメタライズ層 ２３　　　　　　はんだ接合層 代理人　弁理士　井　上　−男 第　　１　　図 Ｓａ 第　　４　　図

Claims (1)

    【特許請求の範囲】
  1. シリコンオンサファイア構造の半導体装置において、サ
    ファイア基板の露出側主面を金属層または金属とシリコ
    ンの共晶層を介して外囲器内に固着させたことを特徴と
    する半導体装置。
JP56188439A 1981-11-26 1981-11-26 半導体装置 Pending JPS5891644A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56188439A JPS5891644A (ja) 1981-11-26 1981-11-26 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56188439A JPS5891644A (ja) 1981-11-26 1981-11-26 半導体装置

Publications (1)

Publication Number Publication Date
JPS5891644A true JPS5891644A (ja) 1983-05-31

Family

ID=16223693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56188439A Pending JPS5891644A (ja) 1981-11-26 1981-11-26 半導体装置

Country Status (1)

Country Link
JP (1) JPS5891644A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4663652A (en) * 1983-11-21 1987-05-05 Sumotomo Electric Industries, Ltd. Package for optical device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4663652A (en) * 1983-11-21 1987-05-05 Sumotomo Electric Industries, Ltd. Package for optical device

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