JPS5890728A - 半導体ウエファ上の位置合せ用マ−クの製法 - Google Patents

半導体ウエファ上の位置合せ用マ−クの製法

Info

Publication number
JPS5890728A
JPS5890728A JP56188654A JP18865481A JPS5890728A JP S5890728 A JPS5890728 A JP S5890728A JP 56188654 A JP56188654 A JP 56188654A JP 18865481 A JP18865481 A JP 18865481A JP S5890728 A JPS5890728 A JP S5890728A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
alignment mark
regions
mask
mask layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56188654A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6211491B2 (fr
Inventor
Hiroo Kinoshita
博雄 木下
Toshiro Ono
俊郎 小野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56188654A priority Critical patent/JPS5890728A/ja
Publication of JPS5890728A publication Critical patent/JPS5890728A/ja
Publication of JPS6211491B2 publication Critical patent/JPS6211491B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
JP56188654A 1981-11-25 1981-11-25 半導体ウエファ上の位置合せ用マ−クの製法 Granted JPS5890728A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56188654A JPS5890728A (ja) 1981-11-25 1981-11-25 半導体ウエファ上の位置合せ用マ−クの製法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56188654A JPS5890728A (ja) 1981-11-25 1981-11-25 半導体ウエファ上の位置合せ用マ−クの製法

Publications (2)

Publication Number Publication Date
JPS5890728A true JPS5890728A (ja) 1983-05-30
JPS6211491B2 JPS6211491B2 (fr) 1987-03-12

Family

ID=16227497

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56188654A Granted JPS5890728A (ja) 1981-11-25 1981-11-25 半導体ウエファ上の位置合せ用マ−クの製法

Country Status (1)

Country Link
JP (1) JPS5890728A (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6218714A (ja) * 1985-07-18 1987-01-27 Nippon Telegr & Teleph Corp <Ntt> アライメントマ−クの形成方法
JPH04330710A (ja) * 1990-03-12 1992-11-18 Fujitsu Ltd レーザトリミング用位置合わせマーク、半導体装置、及び半導体装置の製造方法
US5528372A (en) * 1990-03-12 1996-06-18 Fujitsu Limited Alignment mark, laser trimmer and semiconductor device manufacturing process
US6822342B2 (en) 2000-08-30 2004-11-23 Micron Technology, Inc. Raised-lines overlay semiconductor targets and method of making the same
JP2008135495A (ja) * 2006-11-28 2008-06-12 Nec Electronics Corp 半導体装置、及び表示装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49113581A (fr) * 1973-02-26 1974-10-30
JPS5253668A (en) * 1975-10-29 1977-04-30 Hitachi Ltd Production of semiconductor device
JPS5494881A (en) * 1978-01-12 1979-07-26 Nippon Telegr & Teleph Corp <Ntt> Exposure method
JPS5674936A (en) * 1979-11-22 1981-06-20 Sharp Corp Position detection method of semiconductor chip

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49113581A (fr) * 1973-02-26 1974-10-30
JPS5253668A (en) * 1975-10-29 1977-04-30 Hitachi Ltd Production of semiconductor device
JPS5494881A (en) * 1978-01-12 1979-07-26 Nippon Telegr & Teleph Corp <Ntt> Exposure method
JPS5674936A (en) * 1979-11-22 1981-06-20 Sharp Corp Position detection method of semiconductor chip

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6218714A (ja) * 1985-07-18 1987-01-27 Nippon Telegr & Teleph Corp <Ntt> アライメントマ−クの形成方法
JPH04330710A (ja) * 1990-03-12 1992-11-18 Fujitsu Ltd レーザトリミング用位置合わせマーク、半導体装置、及び半導体装置の製造方法
US5528372A (en) * 1990-03-12 1996-06-18 Fujitsu Limited Alignment mark, laser trimmer and semiconductor device manufacturing process
US6822342B2 (en) 2000-08-30 2004-11-23 Micron Technology, Inc. Raised-lines overlay semiconductor targets and method of making the same
US6914017B1 (en) * 2000-08-30 2005-07-05 Micron Technology, Inc. Residue free overlay target
JP2008135495A (ja) * 2006-11-28 2008-06-12 Nec Electronics Corp 半導体装置、及び表示装置

Also Published As

Publication number Publication date
JPS6211491B2 (fr) 1987-03-12

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