JPS5857691A - 半導体メモリ - Google Patents
半導体メモリInfo
- Publication number
- JPS5857691A JPS5857691A JP56155100A JP15510081A JPS5857691A JP S5857691 A JPS5857691 A JP S5857691A JP 56155100 A JP56155100 A JP 56155100A JP 15510081 A JP15510081 A JP 15510081A JP S5857691 A JPS5857691 A JP S5857691A
- Authority
- JP
- Japan
- Prior art keywords
- current
- memory cell
- inverse
- emitter
- semiconductor memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/415—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56155100A JPS5857691A (ja) | 1981-09-30 | 1981-09-30 | 半導体メモリ |
| US06/425,649 US4488268A (en) | 1981-09-29 | 1982-09-28 | Semiconductor memory |
| DE8282305106T DE3268848D1 (en) | 1981-09-29 | 1982-09-28 | Multi-emitter transistor memory device with word-line discharge current source |
| EP82305106A EP0077144B1 (en) | 1981-09-29 | 1982-09-28 | Multi-emitter transistor memory device with word-line discharge current source |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56155100A JPS5857691A (ja) | 1981-09-30 | 1981-09-30 | 半導体メモリ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5857691A true JPS5857691A (ja) | 1983-04-05 |
| JPS6142348B2 JPS6142348B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1986-09-20 |
Family
ID=15598621
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56155100A Granted JPS5857691A (ja) | 1981-09-29 | 1981-09-30 | 半導体メモリ |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5857691A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
-
1981
- 1981-09-30 JP JP56155100A patent/JPS5857691A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6142348B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1986-09-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1030018C (zh) | 存储器中的位存储单元 | |
| JPS6329359B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| JPS5847792B2 (ja) | ビット線制御回路 | |
| JPH02282995A (ja) | 半導体記憶装置 | |
| JPH0316717B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| JPS5857691A (ja) | 半導体メモリ | |
| JPS59151386A (ja) | 半導体記憶装置 | |
| JPS6196588A (ja) | 半導体記憶装置 | |
| JPS6249677B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| JP2606403B2 (ja) | 半導体メモリ | |
| JPH0752587B2 (ja) | ワードラインドライバ回路 | |
| JPS6047667B2 (ja) | 記憶装置 | |
| JPS62141696A (ja) | バイポーラｒａｍセル | |
| JPH0152834B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| JPS5845115B2 (ja) | 半導体メモリ書込回路 | |
| JP3022567B2 (ja) | 半導体記憶装置 | |
| JPH03116490A (ja) | スタティックｒａｍ | |
| JPS62140295A (ja) | バイポーラｒａｍセル | |
| JPS6066387A (ja) | 半導体記憶装置 | |
| JPS58169391A (ja) | 半導体記憶装置 | |
| JPH01145854A (ja) | 半導体メモリセル | |
| JPS6214918B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| Nakase et al. | A 2-ns 16K bipolar ECL RAM with reduced word-line voltage swing | |
| JPS58115681A (ja) | 半導体メモリのビツト線駆動回路 | |
| JPS60217588A (ja) | 半導体記憶装置 |