JPS5853838A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5853838A
JPS5853838A JP56152632A JP15263281A JPS5853838A JP S5853838 A JPS5853838 A JP S5853838A JP 56152632 A JP56152632 A JP 56152632A JP 15263281 A JP15263281 A JP 15263281A JP S5853838 A JPS5853838 A JP S5853838A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor element
supporter
electrode
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56152632A
Other languages
Japanese (ja)
Other versions
JPS6360533B2 (en
Inventor
Takashi Kondo
隆 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56152632A priority Critical patent/JPS5853838A/en
Publication of JPS5853838A publication Critical patent/JPS5853838A/en
Publication of JPS6360533B2 publication Critical patent/JPS6360533B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To alleviate the stresses on the weakest projecting electrode, by providing a supporter constituted of the same material as a substrate on the surface without projecting electrodes of a semiconductor element by using an adhesive, when the projecting electrodes of electrode lead-out parts provided on the semiconductor element are press fitted to the substrate constituted of ceramic, glass epoxy, etc. CONSTITUTION:When one or a plurality of projecting electrodes 3 of a semiconductor element 2 are press fitted to the substrate 1 constituted of ceramic, glass epoxy, etc., the supporter 4 wherein approx. the same dimensions as the element 2 and the same material as the substrate 1 are used is fixed on the opposed surface of the element 2 without the existance of projecting electrodes 3 by using the adhesive 5. Thereat, the supporter 4 can be in a plate form, and also the means to improve the discharge characteristic or through holes to lead out electrodes to the outside can be provided. Thus, the element 2 and the substrate 1 are expanded and contracted in the same manner, and accordingly stresses on the electrode 3 are reduced.

Description

【発明の詳細な説明】 この発明は多数の凸起電極を有する半導体素子をセラミ
ック等からなる基板に固着する半導体装置に関するもの
である・ 従来この種の７工−スダクンボンデイング方式半導体装
置においては、凸起電極の機械的損傷を避けるため凸起
電極を半導体素子の中央部にもって色たりして、かな□
り無理なプロセスを採っていた。また、電極を半導体素
子の周辺部に設ける場合にお込ては素子の大きさに制限
があり大きな素子には適用できなかった。[Detailed Description of the Invention] This invention relates to a semiconductor device in which a semiconductor element having a large number of convex electrodes is fixed to a substrate made of ceramic or the like. Conventionally, in this type of seven-step bonding method semiconductor device, In order to avoid mechanical damage to the convex electrode, the convex electrode is placed in the center of the semiconductor element and colored.
The company had adopted an unreasonable process. Furthermore, when providing electrodes on the periphery of a semiconductor element, there is a limit to the size of the element, and the method cannot be applied to large elements.

本発明は上記欠点を除くため、半導体素子の凸起部を有
する面と反対の面部に、基板と同一の材質からなるサポ
ータを固着したことを特徴とする。In order to eliminate the above drawbacks, the present invention is characterized in that a supporter made of the same material as the substrate is fixed to the surface of the semiconductor element opposite to the surface having the protrusion.

図は本発明の構成を示し、＋１１　Ｉ／ｉ半導体素子（
２）を１個あるいけ複数個塔載するための基板で、通常
はセラミック、あるいはガラスエポキシ材からなる。The figure shows the configuration of the present invention, and includes a +11 I/i semiconductor element (
A substrate on which one or more of 2) is mounted, and is usually made of ceramic or glass epoxy material.

【３１は（２１と＋Ｉ＋を電気的、機械的に接続するた
めの凸起電極を示し、半導体素子（ｚｌ、および基板Ｉ
ｌ＋の両方、あるいは一方に凸起を設けた、いわいる１
バンプ“であり、半田等からなり、比較的機械的には弱
い。この弱い部分に、熱膨張差により発生する。熱応力
等が加わり、〕（ンプ１３１を破壊する。[31 indicates a convex electrode for electrically and mechanically connecting (21 and +I+), and a semiconductor element (zl) and a substrate I
So-called 1 with a convexity on both or one side of l+
This bump is made of solder or the like and is relatively mechanically weak.This weak portion is generated due to a difference in thermal expansion.Thermal stress, etc. is applied to this weak portion, destroying the bump 131.

本発明はかかる熱応力が最も弱いバンプ部にかかるのを
防止し、高イさ傾度な接続部を得るためになされたもの
で、凸起電極（３）を有する囲と反対の面に、基板＋１
１と同一の材質を何し、かつ、半導体素子（りを抱束す
るに十分な厚さを有するサポータ（４１を設け、接着層
）６）により固着させたものである。The present invention was made in order to prevent such thermal stress from being applied to the weakest bump portion and to obtain a connection portion with a high slope. +1
It is made of the same material as 1 and is fixed with a supporter (41 provided, adhesive layer) 6 having a thickness sufficient to hold the semiconductor element.

なお、上記サポータ（４）は単に、板状のものでもよい
が、放熱特性向上のだめの手段や、さらに外部への電極
取り出し等のためのスルホールを設けることも可能であ
る。Note that the supporter (4) may be simply plate-shaped, but it is also possible to provide means for improving heat dissipation characteristics and through holes for taking out electrodes to the outside.

また、図示はしていないが、基板＋１３へ半導体素子（
２１を多数塔載するいわゆるモジュールの場合にも適用
できるし、その場合には、サポータ１４）は多数の半導
体素子＋ｉ＋　ｔｉｃ　１１＜通約な構造にもできるの
は言うまでもない。Although not shown, a semiconductor element (
It goes without saying that the supporter 14) can also be applied to a so-called module in which a large number of semiconductor elements 21 are mounted, and in that case, the supporter 14) can have a structure similar to that of a large number of semiconductor elements +i+ tic 11.

以上のようにこの発明によれば、半導体素子と基板が同
じように、伸縮するので、最も弱い凸起電極部へのスト
レスの緩和が可能であ）、大きな半導体素子においても
フェースダクンボンディング方式の適用が可能になし得
る効果がある。As described above, according to the present invention, since the semiconductor element and the substrate expand and contract in the same way, it is possible to alleviate the stress on the weakest convex electrode part), and the face-down bonding method can be used even for large semiconductor elements. There are some effects that can be achieved through the application of

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明の一実施例を示す構成図である。 ｆｉｌけ基板、（２）は半導体素子、（３）は凸起電極
、（４）けサポータを示す。 代理人　葛野　信−The figure is a configuration diagram showing an embodiment of the present invention. (2) is a semiconductor element, (3) is a convex electrode, and (4) is a supporter. Agent Makoto Kazuno

Claims (1)

【特許請求の範囲】[Claims] 電極取り出し部に凸起電極を有する半導体素子と、この
半導体素子が取付けられるセラミック等からなる基板と
を有する半導体装置において、上記半導体素子の凸起電
極を有する面上反対の面に上記基板と同一材質からなる
す“ボータを設けたことを特徴とする半導体装置。In a semiconductor device having a semiconductor element having a protruding electrode on an electrode extraction portion, and a substrate made of ceramic or the like to which this semiconductor element is attached, a surface of the semiconductor element having a convex electrode on a surface opposite to that of the substrate is provided. A semiconductor device characterized by having a "voter" made of a material.
JP56152632A 1981-09-26 1981-09-26 Semiconductor device Granted JPS5853838A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56152632A JPS5853838A (en) 1981-09-26 1981-09-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56152632A JPS5853838A (en) 1981-09-26 1981-09-26 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5853838A true JPS5853838A (en) 1983-03-30
JPS6360533B2 JPS6360533B2 (en) 1988-11-24

Family

ID=15544626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56152632A Granted JPS5853838A (en) 1981-09-26 1981-09-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5853838A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04122460U (en) * 1991-04-15 1992-11-04 三菱自動車工業株式会社 Workpiece fixing device
JP2002270634A (en) * 2001-03-08 2002-09-20 Rohm Co Ltd Semiconductor device
JP2007318182A (en) * 2007-09-03 2007-12-06 Rohm Co Ltd Semiconductor device
JP2011044755A (en) * 2010-12-03 2011-03-03 Rohm Co Ltd Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS48101085A (en) * 1972-03-31 1973-12-20

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS48101085A (en) * 1972-03-31 1973-12-20

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04122460U (en) * 1991-04-15 1992-11-04 三菱自動車工業株式会社 Workpiece fixing device
JP2002270634A (en) * 2001-03-08 2002-09-20 Rohm Co Ltd Semiconductor device
JP2007318182A (en) * 2007-09-03 2007-12-06 Rohm Co Ltd Semiconductor device
JP2011044755A (en) * 2010-12-03 2011-03-03 Rohm Co Ltd Semiconductor device

Also Published As

Publication number Publication date
JPS6360533B2 (en) 1988-11-24

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