JPH0287654A - Surface mounting semiconductor device - Google Patents
Surface mounting semiconductor deviceInfo
- Publication number
- JPH0287654A JPH0287654A JP24147588A JP24147588A JPH0287654A JP H0287654 A JPH0287654 A JP H0287654A JP 24147588 A JP24147588 A JP 24147588A JP 24147588 A JP24147588 A JP 24147588A JP H0287654 A JPH0287654 A JP H0287654A
- Authority
- JP
- Japan
- Prior art keywords
- board
- semiconductor device
- groove
- external lead
- fixing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 19
- 239000011347 resin Substances 0.000 claims abstract description 12
- 229920005989 resin Polymers 0.000 claims abstract description 12
- 238000007789 sealing Methods 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims description 13
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 3
- 238000005476 soldering Methods 0.000 abstract description 2
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は表面実装型半導体装置に関し、特にその固定用
突起部の外形形状に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a surface-mounted semiconductor device, and particularly to the external shape of a fixing protrusion thereof.
実装基板に外部リード孔を開けずに基板表面に装着する
ことのできる所謂表面実装型の半導体装置は、従来第４
図に示すように基板面に対する外部リード２の固定位置
を決定する為の突起部３′が封止樹脂体１に設けられる
のが通常である。So-called surface-mount semiconductor devices, which can be mounted on the surface of a mounting board without making external lead holes, are conventionally
As shown in the figure, the sealing resin body 1 is usually provided with a protrusion 3' for determining the fixing position of the external lead 2 with respect to the substrate surface.
上述した従来の表面実装型半導体装置を基板上に実装す
るには、まず実装すべき実装基板表面に接着剤等で仮接
着した後、半田槽等を通過させて各外部リード２と基板
の各電極とを電気的に接続する方法が一般的に採られて
いる。しかし、この時、半田槽の湿度は１８０℃以上に
上げられているので、各部分は熱膨張係数の違いにより
半田槽内で変形を起こし、外部リード２と基板の電極間
に隙間を発生させることがある。また、近年は実装密度
を上げる目的で基板の両面にそれぞれ半導体装置を実装
するようになってきているが、この場合は基板の下面に
位置する半導体装置は半田槽通過の際の熱により接着剤
が破壊され、脱落する事故がしばしば見られるようにな
って来ている。In order to mount the conventional surface mount type semiconductor device described above on a board, first, it is temporarily bonded to the surface of the mounting board to be mounted using an adhesive or the like, and then passed through a solder bath or the like to connect each external lead 2 and each part of the board. Generally, a method is adopted in which the electrodes are electrically connected. However, at this time, the humidity in the solder bath is raised to over 180°C, so each part is deformed in the solder bath due to the difference in thermal expansion coefficient, creating a gap between the external lead 2 and the electrode on the board. Sometimes. Additionally, in recent years, semiconductor devices have been mounted on both sides of the board in order to increase packaging density, but in this case, the semiconductor devices located on the bottom of the board are bonded to the adhesive due to the heat generated when passing through the solder bath. Accidents in which parts are destroyed and fall off are becoming more common.
本発明の目的は、上記の状況に鑑み、実装基板上の固定
用突起部が半田槽通過の際脱落することなき表面実装型
半導体装置提供することである。SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a surface-mounted semiconductor device in which fixing protrusions on a mounting board do not fall off when passing through a solder bath.
本発明によれば、表面実装型半導体装置は、封止樹脂体
の底面に実装すべき実装基板上の位置固定を目的とする
固定用突起部が設けられ、前記固定用突起部は前記実装
基板の機械的に結合する抜け防止用の固定用溝を備える
と共に、前記固定用溝の前記封止樹脂体の最も近い面と
外部リードの基板に最も近い面との寸法差が０．１〜０
．３ｍｍの間に設定されていることを含んで構成される
。According to the present invention, the surface mount type semiconductor device is provided with a fixing protrusion for the purpose of fixing the position on the mounting board to be mounted on the bottom surface of the sealing resin body, and the fixing protrusion is arranged on the mounting board. and a fixing groove for mechanically coupling to prevent detachment, and a dimensional difference between the surface of the fixing groove closest to the sealing resin body and the surface of the external lead closest to the substrate is 0.1 to 0.
．． 3mm.
以下図面を参照して本発明の詳細な説明する。 The present invention will be described in detail below with reference to the drawings.
第１図（ａ）および（ｂ）はそれぞれ本発明の一実施例
を示す表面実装型半導体装置の断面図およびその基板へ
の実装図である。本実施例によれば固定用突起部３には
実装基板５と機械的に結合する切込み構造の固定用？’
Ｍ４が設けられる。この際、外部リード２の基板５に対
する接触面と固定用溝４と基板５の結合面との間の寸法
差δが０．１〜０．３ｍｍになっているように設定され
る。FIGS. 1(a) and 1(b) are a cross-sectional view of a surface-mounted semiconductor device and a view of its mounting on a substrate, respectively, showing one embodiment of the present invention. According to this embodiment, the fixing protrusion 3 has a notch structure for fixing the mounting board 5 mechanically. '
M4 is provided. At this time, the dimensional difference δ between the contact surface of the external lead 2 with respect to the substrate 5 and the bonding surface of the fixing groove 4 and the substrate 5 is set to be 0.1 to 0.3 mm.
第２図は本発明の他の実施例を示す表面実装型半導体装
置の断面図である。本実施例によれば外部リード２の先
端と固定溝４との寸法差δが０．１〜０．３ｍｍに設定
された他、封止樹脂体１と基板５との間に更に空間を設
けたものである。FIG. 2 is a sectional view of a surface-mounted semiconductor device showing another embodiment of the present invention. According to this embodiment, the dimensional difference δ between the tip of the external lead 2 and the fixing groove 4 is set to 0.1 to 0.3 mm, and an additional space is provided between the sealing resin body 1 and the substrate 5. It is something that
第３図は本発明のその他の実施例を示す表面実装型半導
体装置の断面図である。本実施例によれば、固定用突起
部３が２本設けられ、それぞれ固定溝４ａ、４ｂと外部
リード２の先端との寸法差δを前実施例同様に０．１〜
０．３ｍｍにしたものである。本実施例によると基板５
と封止樹脂体１との間にさらに大きな空間を設けること
ができる。FIG. 3 is a sectional view of a surface-mounted semiconductor device showing another embodiment of the present invention. According to this embodiment, two fixing protrusions 3 are provided, and the dimensional difference δ between the respective fixing grooves 4a, 4b and the tip of the external lead 2 is set to 0.1 to 0.1 as in the previous embodiment.
It is set to 0.3 mm. According to this embodiment, the substrate 5
A larger space can be provided between the sealing resin body 1 and the sealing resin body 1.
以上の実施例から明らかなように、本発明によれば、仮
接着を行う工程を省くことが出来、接着剤及び工数の削
減によりコスト・ダウンを行うことができる。又、半田
付の時の熱により基板が変形した際でも０．１〜０．３
ｍｍの寸法差がある為に、半導体装置と基板の電極との
間に隙間が生しることなく、信頼性を向上させることが
出来る。この時、寸法差が０．１ｍｍ以下では基板の変
形量が多い為に隙間が生じ、０．３ ｍ ｍ以上ではリ
ードの付は根にストレスがかがり封止樹脂体にクラック
が生じてしまう。さらに、基板の両面に実装する両面実
装の時にも熱に弱い接着剤を使う必要がない為に、半田
槽通過の際に脱落する事故を防ぐことが出来、高密度実
装の歩留りの向上を行うことが出来る。特に基板と半導
体装置との間に空間が設けた場合ではこの空間に風を送
ることができるので、半導体装置の熱抵抗を下げること
が出来る。また大きな空間を利用してチップコンデンサ
ーを搭載することも可能となり、更に固定溝を２本設け
れば空間による熱放散効果の他し
により安定した固定溝Ｍることか出来る。As is clear from the above embodiments, according to the present invention, the step of temporarily adhering can be omitted, and costs can be reduced by reducing the adhesive and the number of steps. Also, even when the board is deformed due to the heat during soldering, the
Since there is a dimensional difference of mm, there is no gap between the semiconductor device and the electrode of the substrate, and reliability can be improved. At this time, if the dimensional difference is less than 0.1 mm, the amount of deformation of the substrate is large, resulting in a gap, and if it is more than 0.3 mm, stress is applied to the roots of the leads, causing cracks in the sealing resin body. Furthermore, since there is no need to use adhesives that are sensitive to heat when mounting on both sides of the board, accidents such as falling off when passing through a solder bath can be prevented, improving the yield of high-density mounting. I can do it. Particularly when a space is provided between the substrate and the semiconductor device, air can be blown into this space, thereby reducing the thermal resistance of the semiconductor device. In addition, it becomes possible to mount a chip capacitor using a large space, and if two fixing grooves are provided, a more stable fixing groove M can be achieved in addition to the heat dissipation effect due to the space.
第１図（ａ）および（ｂ）はそれぞれ本発明の一実施例
を示す表面実装型半導体装置の断面図およびその基板へ
の実装図、第２図は本発明の他の実施例を示す表面実装
型半導体装置の断面図、第３図は本発明のその他の実施
例を示す表面実装型半導体装置の断面図、第４図は従来
の表面実装型半導体装置の断面図である。
１・・・封止樹脂体、２・・・外部リード、３・・・固
定用突起部、４・・・固定用溝、δ・・・外部リードの
基板に最も近い面と固定用溝の封止樹脂体に最も近い面
との寸法差、５・・・実装基板。FIGS. 1(a) and (b) are a cross-sectional view of a surface-mounted semiconductor device showing one embodiment of the present invention and a view of its mounting on a substrate, respectively, and FIG. 2 is a surface-mounted semiconductor device showing another embodiment of the present invention. FIG. 3 is a cross-sectional view of a surface-mounted semiconductor device showing another embodiment of the present invention, and FIG. 4 is a cross-sectional view of a conventional surface-mounted semiconductor device. 1... Sealing resin body, 2... External lead, 3... Fixing protrusion, 4... Fixing groove, δ... Between the surface of the external lead closest to the substrate and the fixing groove Dimensional difference with the surface closest to the sealing resin body, 5... Mounting board.
Claims (1)
を目的とする固定用突起部が設けられ、前記固定用突起
部は前記実装基板の機械的に結合する抜け防止用の固定
用溝を備えると共に、前記固定用溝の前記封止樹脂体の
最も近い面と外部リードの基板に最も近い面との寸法差
が０．１〜０．３ｍｍの間に設定されていることを特徴
とする表面実装型半導体装置。A fixing protrusion for the purpose of fixing the position on the mounting board to be mounted is provided on the bottom surface of the sealing resin body, and the fixing protrusion is provided with a fixing groove for mechanically coupling the mounting board to prevent it from coming off. and a dimensional difference between the surface of the fixing groove closest to the sealing resin body and the surface of the external lead closest to the substrate is set between 0.1 and 0.3 mm. surface-mounted semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24147588A JPH0287654A (en) | 1988-09-26 | 1988-09-26 | Surface mounting semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24147588A JPH0287654A (en) | 1988-09-26 | 1988-09-26 | Surface mounting semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0287654A true JPH0287654A (en) | 1990-03-28 |
Family
ID=17074867
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24147588A Pending JPH0287654A (en) | 1988-09-26 | 1988-09-26 | Surface mounting semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0287654A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5635760A (en) * | 1993-07-01 | 1997-06-03 | Nec Corporation | Surface mount semiconductor device |
| US5661639A (en) * | 1994-10-25 | 1997-08-26 | Rohm Co., Ltd. | Structure for attaching a heat sink to a semiconductor device |
| US5670429A (en) * | 1993-06-30 | 1997-09-23 | Rohm Co. Ltd. | Process of conveying an encapsulated electronic component by engaging an integral resin projection |
-
1988
- 1988-09-26 JP JP24147588A patent/JPH0287654A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5670429A (en) * | 1993-06-30 | 1997-09-23 | Rohm Co. Ltd. | Process of conveying an encapsulated electronic component by engaging an integral resin projection |
| US5739054A (en) * | 1993-06-30 | 1998-04-14 | Rohm Co., Ltd. | Process for forming an encapsulated electronic component having an integral resin projection |
| US5760481A (en) * | 1993-06-30 | 1998-06-02 | Rohm Co., Ltd. | Encapsulated electronic component containing a holding member |
| US5635760A (en) * | 1993-07-01 | 1997-06-03 | Nec Corporation | Surface mount semiconductor device |
| US5661639A (en) * | 1994-10-25 | 1997-08-26 | Rohm Co., Ltd. | Structure for attaching a heat sink to a semiconductor device |
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