JPS5848959A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS5848959A
JPS5848959A JP56146287A JP14628781A JPS5848959A JP S5848959 A JPS5848959 A JP S5848959A JP 56146287 A JP56146287 A JP 56146287A JP 14628781 A JP14628781 A JP 14628781A JP S5848959 A JPS5848959 A JP S5848959A
Authority
JP
Japan
Prior art keywords
region
semiconductor
type
complementary
depth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56146287A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0332225B2 (enExample
Inventor
Kazuhiko Hashimoto
一彦 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56146287A priority Critical patent/JPS5848959A/ja
Publication of JPS5848959A publication Critical patent/JPS5848959A/ja
Publication of JPH0332225B2 publication Critical patent/JPH0332225B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP56146287A 1981-09-18 1981-09-18 半導体装置 Granted JPS5848959A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56146287A JPS5848959A (ja) 1981-09-18 1981-09-18 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56146287A JPS5848959A (ja) 1981-09-18 1981-09-18 半導体装置

Publications (2)

Publication Number Publication Date
JPS5848959A true JPS5848959A (ja) 1983-03-23
JPH0332225B2 JPH0332225B2 (enExample) 1991-05-10

Family

ID=15404283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56146287A Granted JPS5848959A (ja) 1981-09-18 1981-09-18 半導体装置

Country Status (1)

Country Link
JP (1) JPS5848959A (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59135758A (ja) * 1983-01-24 1984-08-04 Seiko Epson Corp 半導体装置
JPS6114744A (ja) * 1984-06-29 1986-01-22 Fujitsu Ltd 半導体装置
US4628340A (en) * 1983-02-22 1986-12-09 Tokyo Shibaura Denki Kabushiki Kaisha CMOS RAM with no latch-up phenomenon
JPS6211261A (ja) * 1985-07-08 1987-01-20 Nec Corp Ｃｍｏｓメモリ装置
US5079613A (en) * 1987-07-10 1992-01-07 Kabushiki Kaisha Toshiba Semiconductor device having different impurity concentration wells
US5374838A (en) * 1987-07-10 1994-12-20 Kabushiki Kaisha Toshiba Semiconductor device having different impurity concentration wells

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52117086A (en) * 1976-03-29 1977-10-01 Sharp Corp Semiconductor device for touch type switch
JPS5323577A (en) * 1976-08-18 1978-03-04 Hitachi Ltd Complementary type insulated gate effect transistor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52117086A (en) * 1976-03-29 1977-10-01 Sharp Corp Semiconductor device for touch type switch
JPS5323577A (en) * 1976-08-18 1978-03-04 Hitachi Ltd Complementary type insulated gate effect transistor

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59135758A (ja) * 1983-01-24 1984-08-04 Seiko Epson Corp 半導体装置
US4628340A (en) * 1983-02-22 1986-12-09 Tokyo Shibaura Denki Kabushiki Kaisha CMOS RAM with no latch-up phenomenon
JPS6114744A (ja) * 1984-06-29 1986-01-22 Fujitsu Ltd 半導体装置
JPS6211261A (ja) * 1985-07-08 1987-01-20 Nec Corp Ｃｍｏｓメモリ装置
US5079613A (en) * 1987-07-10 1992-01-07 Kabushiki Kaisha Toshiba Semiconductor device having different impurity concentration wells
US5374838A (en) * 1987-07-10 1994-12-20 Kabushiki Kaisha Toshiba Semiconductor device having different impurity concentration wells

Also Published As

Publication number Publication date
JPH0332225B2 (enExample) 1991-05-10

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