JPS5848432A - 混成集積回路の製法 - Google Patents

混成集積回路の製法

Info

Publication number
JPS5848432A
JPS5848432A JP56146866A JP14686681A JPS5848432A JP S5848432 A JPS5848432 A JP S5848432A JP 56146866 A JP56146866 A JP 56146866A JP 14686681 A JP14686681 A JP 14686681A JP S5848432 A JPS5848432 A JP S5848432A
Authority
JP
Japan
Prior art keywords
circuit
aluminum
copper
alminum
foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56146866A
Other languages
English (en)
Other versions
JPH0115153B2 (ja
Inventor
Shinichiro Asai
新一郎 浅井
Kazuo Kato
和男 加藤
Tatsuo Nakano
辰夫 中野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo KK filed Critical Denki Kagaku Kogyo KK
Priority to JP56146866A priority Critical patent/JPS5848432A/ja
Publication of JPS5848432A publication Critical patent/JPS5848432A/ja
Publication of JPH0115153B2 publication Critical patent/JPH0115153B2/ja
Granted legal-status Critical Current

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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は−、アルミニウムリード線により半導体と回路
結線とを繁雑な作業を必要とせず、エツチングのみによ
って信頼性の高いボンデングを可能とした混成集積回路
の製法に関する。
従来、混成集積回路はセラミツ゛りやガラス基板上に抵
抗体やトランジスターの如き回路部品を適宜付着したも
の、あるいはアルミニウムまたは鉄基板上に絶縁層を設
け、この上に回路を組み込む方式が一般的である−　　
　゛ これら基板の上には、半田付による半導体のグイボンデ
ィング、外部への端子接続、チップコンデンサー等チッ
プ部品の取付けられ、また半導体と回路との接続は、金
線又はアルミニウム線によりワイヤーボンディングされ
ている。
アルミニウムワイヤーの接続については、貴金属メッキ
による処理、ニッケルメッキ（縛公昭５２−５４６°１
号）、アルミニウム蒸着メッキ（特開昭５１−２８６６
２号）及び金属ペレットの接着（４？公昭４５−３７１
１０号）、等各種の提案がある。しかしながらメッキに
よる場合は、メッキ設備を必要とするほかにメッキ表面
の精度、層厚みを管理するこＡ要であ・、。また、金属
ぺ。
レットの接着の場合は、接着個数が半導体のグイボンデ
ィング数より多く、こわらの作業はきわめて煩雑な作業
である。
また、高分子樹脂絶縁層を有する銅箔回路では、絶縁層
が低ヤング率であるため、超音波振動によリワイヤーポ
ンデイングを行うといわゆる超音波かにげる現象があり
十分なボンディングが不可能である。また、貴金属メッ
キやニッケルメッキ法では、ボンディング表面の精度が
厳密に要・、求されると共にその超音波振動ボンディン
グ条件も狭い範囲で操作しなけれはならなかった。
本発明は、かかる欠点を解決したものであり、金属基板
に絶縁層、アルミニウムー銅クラツド箔を順に積層して
一体化してなる積層物のアルミニウムー銅クラツド箔を
塩化鉄等でエツチングして配線回路を形成させ、しかも
アルカリ又は過硫酸アンモニウムによりエツチングして
アルミニウム回路や銅回路を露出させて、こｔに半田を
介しそ銅回路と半導体や他部材とを積層し、かつ半導体
とアルミニウム回路とをアルミニウムリード線を用い超
音波によって固着するようした混成集積回路の製法を提
供しようとするものである。
すなわち、本発明は、金属基板に絶縁物層、アルミニウ
ムー鋼クラッド箔とを順に積層して一体化してなる積層
物の前記アルミニウムー銅クラツド箔をエツチングして
配線回路を形成させると共にさらにエツチングしてアル
ミニウム回路とを形成させ次いで該アルミニウム回路と
半導体とを超、音波振動、法によりアルミニウムリード
線で固着させることを特徴とする。
−以下図面により本発明の実施例を詳しく説明するが、
第１〜２図は実施例に用いる積層物、第６〜４図は実施
例の断面図、第５図は超音波振動数と引張強度との関係
図である。
まず第１図に示すように本発明に用いる積層物は、金属
基板１の上に絶縁物層２を”積層し、絶縁物層２の面に
アルミニウム箔３がくるようにアルミニウム３と銅４と
のアルミニウムー銅クラツド箔８が積層したものであり
、また、第２図は、第１図のものと逆に構成したもので
絶縁物層２の面に銅箔４がくるようにアルミニウムー銅
クラツド箔８が積層したものである。
次ニ、このアルミニウムー銅クラツド箔８は両者に対し
てエツチング可能な塩化鉄等でエツチングして配線回路
を形成させる。次いで第２図に示す積層物を前記の方法
でエツチングし、さらに卯６図に示すように金属基板１
、絶縁物層２、及びアルミニウム回路３′の一部をアル
カリエツチングして銅回路４′を露出させて、該銅回路
４′上に半田７を介して半導体や低抗体等を載置した後
、半導さらに第４図に示すように、金属基板１、絶縁物
層２、及び銅回路４の一部を過硫酸アンモニウム等でエ
ツチングしてワイヤボンディング部と力るアルミニウム
回路３′を露出せしめ、銅回路４′上には、第６図同様
に半田７を介して半導体、や低抗体等を載置し、半導体
６とアルシミー二、ウム回路３′とを超音波振動法によ
りアルミニウムリード線５により接続する。
本発明に用いる金属基板１としては、良熱伝導性を持つ
０．５〜３．０關のアルミニウム、鉄等力く用いられ、
絶縁物層２としては、７２０μ以上の各種セラミックス
、無機粉体を含有する高分刊１旨絶縁層、ガラス繊維を
含有する高分子樹脂絶縁層、及び耐熱性高分子極脂絶縁
層である。前記無機粉体としては、アルミナ、ベリリヤ
、ポ、ロンナイトライド、マグネシア、シリカ等が好ま
しく、高分子樹脂としては、エポキシ樹脂、フェノール
樹脂、ポリイミド樹脂等が好ましい。また、絶縁物層２
としては、高分子樹脂を含有す、る絶縁層が好ましく、
さらに、アルミニウムー銅クラツド箔８のアルミニウム
は１０〜１００μであり、銅は０．１〜１００μの厚さ
が好ましい。さらにアルミニウムミニラム−鋼りラッド
箔を、又は金又はニッケルメッキした３５μの銅箔をエ
ポキシ系接着剤で接合した金属基板を用い、６０μのア
ルミニウム線を超音波ワイヤーボンディングした時のポ
ンディングパッドの種類と引張り強度の関係を第５図に
示した。すなわち、本発明、によるアルミニウムー銅ク
ラッド箔を用い選択的にエツチングを行なって、アルミ
ニウム箔１５μのボンデイングパツドを形成させた実験
例では引張強度が３５μの銅箔上に金メッキやニッケル
メッキした時より高く、かつ引張強度のバラツキが少な
いことが分かる。
メッキした場合にこのように引張強度のバラツキが大き
くなることは、メッキ面の性状がワイヤーボンディング
性に著しい影響を与えるということであり、メッキによ
ってポンディングパッドを形成する場合には避けられな
い欠点である。
以上説明した通り本発明は、金属基板に絶縁物層、アル
ミニウムー銅クラツド箔を１１　Ｋ　積層し、前記アル
ミニウムー銅クラツド箔をエツチングして配線パターン
を形成すると共に、ポンディングパッドを形成し、半導
体等とアルミニラｌ、回路とのアルミニウムリード線で
の固着が超音波振動法により容易にかつ強固に行わわる
ものである。
【図面の簡単な説明】
第１〜４図は本発明の実施例の断面図であり、第５図は
引張強度の実施例と比較例を表わしたものである。 符号１・・・金属基板、２・・・絶縁物層、３・・アル
ミニウム箔、３′・・・アルミニウム回路、４・・・銅
箔、４′・・銅回路、５・・・アルミニウムリード線、
６・・・半導体、７・・・半田、８・・・アルミニウム
ー銅クラツド箔。 特許出願人電気化学工業株式会社 Ｈｆｐよ刀（Ｗ） 手　　続　　補　　正　　書 昭和５６年１２月１　日 特許庁長官　島　１）春　樹　　殿 １、　事件の表示 昭和５６年特許願第１４６８６６号 ２、発明の名称 混成集積回路の製法 ３、　補正をする者 事件との関係　特許出願人 住所　東京都千代田区有楽町１丁目４番１号明細書の発
明の詳細な説明の欄 ５、　補正の内容 別紙の通り 明細書第５頁下から２行〜第６頁第２行目の「絶縁物層
２としては、２０μ以上の各種セラミックスル樹脂絶縁
層である。」を「絶縁物層２としては、各種セラミック
スル樹脂絶縁層を用い、その肉厚は２０μ以上である。 」と訂正する。 手続補正書 昭ず１５７年Ｚ月ノｒ日 特許庁長官　若杉和夫　殿 １、事件の表示 昭和５６年特許願第１４６８６６号 ２、発明の名称 混成集積回路の製法 ３、補正をする者 事件との関係　　特許出願人 ′　住所　東京都千代田区有楽町１丁目４番１号４、補
正の対象 明細書の特許請求の範囲の欄および発明の詳細な説明の
欄 １、　明細書第１頁下から５〜７行目の「本発明は・・
・・・・ボンデングを可能」を［本発明は、繁雑な作業
の必要な′しにエツチングのみによつ゛て、アルミニウ
ムリード線による半導体と回路との信頼性の高い、ワイ
ヤーギンディングを可能］と訂正する。　　　　　　　
　、　　・ ２、明細書第２頁第５行目の「・・・・・・チップ部品
の取付けられ、・・・・・・」　　Ｆ・・・・・・チッ
プ部品の取付けがなされ、・・・・・・」と、また第６
〜７行目の「・・・・・・アルミニウム線によりワイヤ
ーボンディングされて＼・る。」を「・・・・・・アル
ミニウム線にと訂正する。 ６、　明細書第、３頁第１０行目の「・・・・・・クラ
ツド箔を轡化鉄−等・・・・・・」を「・・・・・・ク
ラツド箔をアルミニラλと銅、の両者をエツチングでき
る塩化鉄等・・・・・・」と訂正する。 ４、　明細書第４頁第８行目の「・・・・・超音波振動
数」を「・・・・・・超音波出力」と訂正する。 ５、明細書Ｍ５５頁第５目の「・・・・・・低抗体・・
・・・・」を「・・・・・チップ低抗体・・・・・司と
さらに第１３行目の「・・・・・・低抗体」を「・・・
・・・チップ低抗体」と訂正する。 ６、　昭和５６年１２月１日付手続補正書の明細書第５
頁下から２行目〜第６頁第２行目の「絶縁物層２として
は、各種セラミックスル樹脂絶縁層を用い、その肉厚は
２０μ以上である。」を「絶縁物層２としては、各種セ
ラミックス、無機粉体な含有する高分子樹脂絶縁層、ガ
ラス繊維を含有する高分子樹脂絶縁層、及び耐熱性高分
子樹脂絶縁層を用い、その肉厚は２０μ以上である。」
と訂正する。 特許請求の範囲 金属基板に絶縁物層、アルミニウムー銅クラツド箔を順
に積層して一体化してなる積層物の前記アルミニウムー
銅クラツド箔をエツチングして、配線回路を形成させ、
さらにエツチングしてアルミニウム回路もしくは銅回路
を形成させ、該アルミニウム回路と半導体とを超音波振
動法によりアルミニウムリード線で固着させることを特
徴とする混成集積回路の製法。 １３

Claims (1)

    【特許請求の範囲】
  1. アルミニウムー銅クラツド箔をエツチングして、配線回
    路を形成させ、さらにエツチングしてアルの製法。
JP56146866A 1981-09-17 1981-09-17 混成集積回路の製法 Granted JPS5848432A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56146866A JPS5848432A (ja) 1981-09-17 1981-09-17 混成集積回路の製法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56146866A JPS5848432A (ja) 1981-09-17 1981-09-17 混成集積回路の製法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP62079790A Division JPS62271442A (ja) 1987-04-02 1987-04-02 混成集積回路

Publications (2)

Publication Number Publication Date
JPS5848432A true JPS5848432A (ja) 1983-03-22
JPH0115153B2 JPH0115153B2 (ja) 1989-03-15

Family

ID=15417333

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56146866A Granted JPS5848432A (ja) 1981-09-17 1981-09-17 混成集積回路の製法

Country Status (1)

Country Link
JP (1) JPS5848432A (ja)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62140730U (ja) * 1986-02-28 1987-09-05
JPS62271442A (ja) * 1987-04-02 1987-11-25 Denki Kagaku Kogyo Kk 混成集積回路
JPS63250164A (ja) * 1987-04-07 1988-10-18 Denki Kagaku Kogyo Kk ハイパワ−用混成集積回路基板とその集積回路
JPS63282780A (ja) * 1987-05-15 1988-11-18 キヤノン株式会社 素子配線電極及びその製造方法
JPS63302530A (ja) * 1987-06-02 1988-12-09 Denki Kagaku Kogyo Kk 回路基板及びその混成集積回路
JPH04119696A (ja) * 1990-09-11 1992-04-21 Denki Kagaku Kogyo Kk 金属板ベース多層回路基板
US7504719B2 (en) 1998-09-28 2009-03-17 Ibiden Co., Ltd. Printed wiring board having a roughened surface formed on a metal layer, and method for producing the same

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4980572A (ja) * 1972-12-11 1974-08-03
JPS50128173A (ja) * 1974-03-29 1975-10-08
JPS5128662A (en) * 1974-09-02 1976-03-11 Sanyo Electric Co Riidosaisen no kochakuhoho
JPS5143571A (ja) * 1974-10-09 1976-04-14 Hiroki Katsuki Keesuisosochi
JPS52378A (en) * 1975-06-23 1977-01-05 Oki Electric Ind Co Ltd Method of forming printed wiring
JPS523461A (en) * 1975-06-25 1977-01-11 Kazutami Saito Measuring, detecting and alarming device of land subsidence under a bu ilding
JPS5259855A (en) * 1975-11-13 1977-05-17 Matsushita Electric Works Ltd Method of producing multiilayer printed circuit substrate
JPS5317747A (en) * 1976-08-02 1978-02-18 Sasaki Mooru Kk Natural light inlet tube
JPS5591896A (en) * 1978-12-28 1980-07-11 Fuji Electric Co Ltd Circuit board
JPS5662388A (en) * 1979-10-26 1981-05-28 Tokyo Shibaura Electric Co Hybrid integrated circuit board

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4980572A (ja) * 1972-12-11 1974-08-03
JPS50128173A (ja) * 1974-03-29 1975-10-08
JPS5128662A (en) * 1974-09-02 1976-03-11 Sanyo Electric Co Riidosaisen no kochakuhoho
JPS5143571A (ja) * 1974-10-09 1976-04-14 Hiroki Katsuki Keesuisosochi
JPS52378A (en) * 1975-06-23 1977-01-05 Oki Electric Ind Co Ltd Method of forming printed wiring
JPS523461A (en) * 1975-06-25 1977-01-11 Kazutami Saito Measuring, detecting and alarming device of land subsidence under a bu ilding
JPS5259855A (en) * 1975-11-13 1977-05-17 Matsushita Electric Works Ltd Method of producing multiilayer printed circuit substrate
JPS5317747A (en) * 1976-08-02 1978-02-18 Sasaki Mooru Kk Natural light inlet tube
JPS5591896A (en) * 1978-12-28 1980-07-11 Fuji Electric Co Ltd Circuit board
JPS5662388A (en) * 1979-10-26 1981-05-28 Tokyo Shibaura Electric Co Hybrid integrated circuit board

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62140730U (ja) * 1986-02-28 1987-09-05
JPS62271442A (ja) * 1987-04-02 1987-11-25 Denki Kagaku Kogyo Kk 混成集積回路
JPS63250164A (ja) * 1987-04-07 1988-10-18 Denki Kagaku Kogyo Kk ハイパワ−用混成集積回路基板とその集積回路
JPS63282780A (ja) * 1987-05-15 1988-11-18 キヤノン株式会社 素子配線電極及びその製造方法
JPS63302530A (ja) * 1987-06-02 1988-12-09 Denki Kagaku Kogyo Kk 回路基板及びその混成集積回路
JPH04119696A (ja) * 1990-09-11 1992-04-21 Denki Kagaku Kogyo Kk 金属板ベース多層回路基板
US7504719B2 (en) 1998-09-28 2009-03-17 Ibiden Co., Ltd. Printed wiring board having a roughened surface formed on a metal layer, and method for producing the same
US7535095B1 (en) 1998-09-28 2009-05-19 Ibiden Co., Ltd. Printed wiring board and method for producing the same
US7994433B2 (en) 1998-09-28 2011-08-09 Ibiden Co., Ltd. Printed wiring board and method for producing the same
US8006377B2 (en) 1998-09-28 2011-08-30 Ibiden Co., Ltd. Method for producing a printed wiring board
US8018045B2 (en) 1998-09-28 2011-09-13 Ibiden Co., Ltd. Printed circuit board
US8020291B2 (en) 1998-09-28 2011-09-20 Ibiden Co., Ltd. Method of manufacturing a printed wiring board
US8030577B2 (en) 1998-09-28 2011-10-04 Ibiden Co., Ltd. Printed wiring board and method for producing the same
US8093507B2 (en) 1998-09-28 2012-01-10 Ibiden Co., Ltd. Printed wiring board and method for producing the same
US8533943B2 (en) 1998-09-28 2013-09-17 Ibiden Co., Ltd. Printed wiring board and method for producing the same

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