JPS5844748A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5844748A
JPS5844748A JP14329981A JP14329981A JPS5844748A JP S5844748 A JPS5844748 A JP S5844748A JP 14329981 A JP14329981 A JP 14329981A JP 14329981 A JP14329981 A JP 14329981A JP S5844748 A JPS5844748 A JP S5844748A
Authority
JP
Japan
Prior art keywords
film
insulating film
field insulating
active region
thick
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14329981A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0117256B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Masataka Shinguu
新宮　正孝
Hideo Monma
門馬　秀夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14329981A priority Critical patent/JPS5844748A/ja
Publication of JPS5844748A publication Critical patent/JPS5844748A/ja
Publication of JPH0117256B2 publication Critical patent/JPH0117256B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
JP14329981A 1981-09-10 1981-09-10 半導体装置の製造方法 Granted JPS5844748A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14329981A JPS5844748A (ja) 1981-09-10 1981-09-10 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14329981A JPS5844748A (ja) 1981-09-10 1981-09-10 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5844748A true JPS5844748A (ja) 1983-03-15
JPH0117256B2 JPH0117256B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-03-29

Family

ID=15335514

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14329981A Granted JPS5844748A (ja) 1981-09-10 1981-09-10 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5844748A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5057451A (en) * 1990-04-12 1991-10-15 Actel Corporation Method of forming an antifuse element with substantially reduced capacitance using the locos technique
US5780352A (en) * 1995-10-23 1998-07-14 Motorola, Inc. Method of forming an isolation oxide for silicon-on-insulator technology

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5548950A (en) * 1978-10-03 1980-04-08 Toshiba Corp Manufacturing of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5548950A (en) * 1978-10-03 1980-04-08 Toshiba Corp Manufacturing of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5057451A (en) * 1990-04-12 1991-10-15 Actel Corporation Method of forming an antifuse element with substantially reduced capacitance using the locos technique
US5780352A (en) * 1995-10-23 1998-07-14 Motorola, Inc. Method of forming an isolation oxide for silicon-on-insulator technology

Also Published As

Publication number Publication date
JPH0117256B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-03-29

Similar Documents

Publication Publication Date Title
JP2519819B2 (ja) コンタクトホ―ルの形成方法
US5130271A (en) Method of manufacturing a semiconductor device having no step at the boundary between self aligned p- or n- type impurity regions
JPH0828424B2 (ja) 半導体装置およびその製造方法
JPS5844748A (ja) 半導体装置の製造方法
JPS6040702B2 (ja) 半導体集積回路装置の製造方法
JPH0210730A (ja) 集積回路チップ上の電界効果トランジスタ用のフィールド・アイソレーション形成方法と構造
JPS60258957A (ja) Ｓｏｉ型半導体装置の製造方法
JPS6359538B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS6231507B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS6227542B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS5933271B2 (ja) 半導体装置の製造方法
JPS61135136A (ja) 半導体装置の製造方法
JPS6163059A (ja) 半導体装置
JPS6038872B2 (ja) 半導体装置の製造方法
JP2943855B2 (ja) 半導体装置の製造方法
JPH043939A (ja) 半導体装置の製造方法
JPS582047A (ja) 半導体装置の製造方法
JPS58170012A (ja) 半導体装置の製造方法
JPS60128633A (ja) 半導体装置ならびにその製造方法
JPH0576769B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS5829620B2 (ja) ハンドウタイソウチノセイゾウホウホウ
JPH04129275A (ja) 半導体装置
JPS5950087B2 (ja) 半導体装置の製造方法
JPS60193358A (ja) 半導体装置の製造方法
JPS60218873A (ja) 半導体装置の製造方法