JPS5844748A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the integration of a semiconductor device by specifying the active region of a semiconductor substrate through an SiO2 film by an Si3N4 film, thereby preventing the variation in the area based on the error or displacing the position of patterning. CONSTITUTION:An Si3N4 mask 11 is formed at a thin SiO2 film 2 on an Si substrate 1. An SiO2 film 12 and an Si3N4 film 13 are laminated, a resist mask 14 is performed, the film 14 is etched, and a field oxidized film forming region is exposed. The mask 14 is removed, is oxidized at a high temperature, and an SiO2 film 15 is formed. Subsequently, the remaining Si3N4 13 is etched, is again oxidized at a high temperature, thereby forming an SiO2 film 16. According to the structure, the variation in the area of the active region can be prevented, and since it is not necessary to provide the margin in the active region, the integration can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and particularly to a modified method for forming a two-yield insulating film.

When manufacturing semiconductor devices such as integrated circuits (ICs),
Active regions forming semiconductor elements, resistance elements, etc. are covered with a different type of insulating film such as silicon nitride (5iaN*) film, and thick silicon oxide (Sing) is used for element isolation.
)# to form a field insulating film consisting of L OCt
) s (local oxidation) method is known.

Such field isolation tS is usually formed at one time by high-temperature oxidation, but for example, when forming a channel cut layer of P+ type and N+m at the periphery of the active region covered with a 513N4 film, it is necessary to Considering the simplification of the process, the field isolation ms is formed using the same mask pattern as the implantation of the channel cut layer. A method of forming a field insulating film is adopted.

FIGS. 1 to 5 show process steps of such a conventional manufacturing method. To briefly explain this, first, as shown in FIG. Form a film 8 with a film thickness of 513N of 2,000 to 0. Next, as shown in FIG. and then remove the exposed 5iaN4111 as shown in FIG.
After removing f8 by etching, the resist 81I4 is also dissolved and removed, and then a field insulating film consisting of a thick 5108 film 5 is formed by high temperature oxidation treatment. Then the fourth
As shown in the figure, the resist 11 is removed by photoprocessing again.
6 to expose the Si8N4 film 8 in the region where the remaining field insulating film is to be formed, and then remove the exposed 513N4 film by etching as shown in FIG. 5, and then dissolve and remove the resist II6. Then, a thick SiO film 7 of sIc is formed by high-temperature oxidation treatment again.

In this step, for example, the formation of the channel cut layer described above is omitted because it is not related to the present invention, but the impurity implantation of the channel cut layer is performed using the same 513N4 film pattern immediately before the high temperature oxidation treatment, ie, as shown in FIG. This is done in stages.

By the way, when the field insulating film made of the thick Si, O, films 5 and 7 is formed in this way, the resist film 4.
The area of the active wA region changes due to the pattern Jung position shift of No. 6. That is, the dimension be in FIG. 6 is not constant. However, it is very inconvenient that the active region forming the element is not constant, and it is necessary to provide an active region with a sufficient margin in consideration of the fluctuation IIk. Providing a generous active region hinders higher integration and higher density, which in turn has a negative effect on improving the characteristics of the iC.

The purpose of this research is to solve this problem, and its feature is that the first Si3N4 film covering the active region is patterned on the semiconductor substrate via the S10g film, and the upper surface is further coated with Si, second 513N through the membrane
4 film covering the entire surface, then a second 5ia Nid
Pattern Jung and thick 5i02 fii on the exposed part
This paper proposes a manufacturing method that includes the steps of forming a field insulating film consisting of 513N4, followed by etching away the remaining second 513N4 film and forming the remaining field insulating film. Explain in detail.

6 to 10 show cross-sectional views of the embodiment according to the present invention in the order of steps, and as shown in FIG.
A thin 5i02 film 2 with a film thickness of 600 films is formed on top by high-temperature oxidation, and a 5j-3N4111 film with a film thickness of about 1000 films is formed on the top surface by vapor phase epitaxy. After the resist film IO is patterned by the process, the 513N4 film is etched by plasma etching using Freon (CF4) gas as an etching agent to form a pattern of the first 5iaN4 film 11 as shown in the figure. The pattern of this 514N4 film 11 is a mask that covers the entire active region. In addition, the thin 8102 film 2 is a buffer layer to avoid distortion of the crystal structure when directly depositing the Si8N4 film on the semi-integrated substrate, and it is generally known to interpose a Si film in this way. It has become.

Next, as shown in FIG. 7, a film of several 100 to 2,000 layers of Sin, $12, is deposited on the top surface by a vapor phase growth method, and then a film of 100 nm thick is deposited on top of it by the same vapor growth method.
Deposit a second 5iaN4 film 18 of 00-8000A. Next, as shown in FIG. 8, the resist film 14 is patterned by a photo process, and a 518N layer is formed on the region including the region where the field insulation St- is to be formed.
, film 18 is CF,
- Removal by plasma etching with gas.

Next, after removing the resist film 14 as shown in FIG.
510g with a film thickness of about 8000A after time heat treatment @ 1
A field insulating film consisting of 6 is produced. in this case,
As shown, the active region is completely protected by the first 5iaN4 film 11. Next, as shown in FIG. 10, the remaining 5iaN4 film 18 was completely removed by plasma etching using CF4 gas as described above, and then subjected to high temperature oxidation treatment again in the same manner as described above to obtain a film thickness of 8,000 mm.
A field insulating film consisting of ins $ 16 is produced. The above is an example. In the explanation, the 5iaN4 film was etched away by plasma etching using OF and gas, but instead of such dry etching, wet etching using hot phosphoric acid may be performed. In fact, wet etching has the advantage of not corroding the 5i02 top. Also, in the first generation example, the second 5i
Although the entire surface of the aN4 film 1B is etched, it may be partially etched using a photoresist. That is, by forming a thick field oxide film 16, for example, a C-MOS
After defining the area, the Si3N4 film 1B is removed only from the part where boron (B+) ions are to be implanted, boron ions are implanted to form a field insulating film, and the remaining powder 51 is removed.
By removing the 8N4 film 18 and ion-implanting phosphorus [F] to form a non-field insulating film, a door-shaped region and an N+-type region (for example, a channel cut region) can be formed under the field insulating film. .

As is clear from this example, the present invention is applicable to the first Si8
Since the active region is regulated by the N4 film 11, the area of the active region does not fluctuate due to pattern Jung misalignment errors, and therefore there is no need to provide a margin for the active region. Therefore, it is useful for increasing the degree of integration and greatly contributes to improving the characteristics of ICs.

[Brief explanation of the drawing]

Figures 1 to 5 are cross-sectional views of the conventional manufacturing method in the order of steps;
FIGS. 6 to 1θ are sectional views of manufacturing dimensions according to the present invention in the order of steps. In the figure, 1 is a semiconductor substrate, and 2 and 12 are thin Sin. Film, 8, 11.18 is Si8N4 film, 6, 7.15゜16 is thick 5in2 film (field insulating film), 4Is,
to, 14 indicates a resist film. ;-+ j-Bow No. 20 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9r21 1st Q M

Claims (1)

[Claims] A first silicon nitride film covering the active region is patterned on a half-contained #substrate via a silicon oxide film, and a second silicon nitride film is further coated on the entire surface thereof with a silicon oxide film interposed therebetween. Next, the second silicon nitride film is patterned to form a field insulating film made of a thick silicon oxide film on the exposed portion.Then, the remaining second silicon 11ide film is etched away, and the remaining field insulating film is etched away. A method of manufacturing a semiconductor device, comprising the step of forming an insulating film.