JPS6040702B2 - Method for manufacturing semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor integrated circuit, and particularly preferably to a method for manufacturing a semiconductor integrated circuit that requires microfabrication technology.

The generally practiced selective oxidation method is Samurai Ko 50-137
9, a silicon nitride film is selectively applied to the active region as a mask for thermal oxidation, followed by thermal oxidation.

This oxidation forms an oxide film in the inactive region, and then the silicon nitride film on the active region is removed to complete the selective oxidation. However, in order to selectively remove the camphor nitride film by etching with hot phosphoric acid, it is necessary to selectively form a silicon dioxide film on the silicon nitride film. This silicon dioxide film is formed by thermal oxidation or vapor phase growth, but if thermal oxidation is used, oxidation must be carried out at 1000q0 for 8 to 1q hours to form an oxide film of several hundred angstroms. Further, oxidation at high temperature and for a long period of time causes distortion in the semiconductor substrate, which is unfavorable in terms of device characteristics. On the other hand, when a boron dioxide film is formed by vapor phase growth, it needs to be thicker than about 0.5 microns to prevent pinholes.
Therefore, if a silicon dioxide film of this thickness is selectively etched by photolithography, an undercut will occur by the thickness of the film. As a result, for example, if a silicon dioxide film with a thickness of 0.5 microns is used, the thickness will be reduced by about 1 micron compared to the original design, which is extremely disadvantageous for fine patterns. An object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit device having a highly accurate pattern and simplifying the manufacturing process.

The present invention provides - a semiconductor integrated circuit device having an active region and an inactive region formed by a selective oxidation method using a silicon nitride film on the main surface of a conductive type semiconductor; a step of implanting ions into the active region; and a step of etching away the frog nitride film on the inactive region;
and forming a boron dioxide film in the ion-implanted inactive region.

The present invention is based on the principle that a silicon nitride film on an inactive region can be selectively etched without undercutting by using accelerated etching caused by ion implantation.

A general effect of the present invention is that steps such as vapor phase growth of the rabies nitride film and Katsuhide dioxide film can be omitted, and the manufacturing process can be simplified.

In addition, the generation of strain caused by oxidation of the nitride film can be reduced, the characteristics of the device can be improved, and on the other hand, restrictions on microfabrication due to the use of vapor phase growth of the silicon dioxide film can be removed. That is, there is an effect that a highly reliable element having a highly accurate fine pattern can be formed. Next, embodiments of the present invention will be described using the drawings. FIG. 1 is a sectional view of the main steps of a first embodiment of the present invention, in which the present invention is applied to the manufacture of an n-channel silicon gate transistor. First, as shown in FIG. 1A, on a P-type semiconductor substrate 101, a katane dioxide film 102 is grown to a thickness of about 1000A at 100 mm, and a silicon nitride film 103 of about 1000 mm is formed. Thereafter, as shown in FIG. 1B, a photoresist 104 is selectively coated by photolithography, and boron ions are subsequently implanted at 5 platens eV under conditions of 1×1 and 5 skins-2. This ion implantation is called channel stopper 1.
This is effective for introducing impurities for forming 05 (FIG. 1C) and for later accelerated etching of the silicon nitride film. Then Figure 1C
As shown in FIG. 3, the boron nitride film 103 on the inactive region is removed by etching in a hydrofluoric acid aqueous solution. At this time, the etching rate of the ion-implanted silicon nitride film 103 in the inactive region is about three times faster than that of the silicon nitride film 106 in the active region that has not been ion-implanted, so the etching rate in the lateral direction is
That is, selective etching can be performed without undercutting.

After that, after removing the photoresist 104, the first
As shown in FIG. D, about 1 micron of cinnamon dioxide 107 is formed at 100 pi by selective oxidation based on the conventional manufacturing method of field effect transistors. The silicon dioxide film 108, silicon nitride film 106, and silicon dioxide film 102 on the active region formed by this oxidation are sequentially etched away. After that, as shown in FIG. 1E, after forming a gate oxide film 109 and polycrystalline silicon 110,
, and a drain 112 are formed, followed by predetermined openings, and aluminum interconnections 113, 114, 115 are completed. FIG. 2 is a diagram for explaining a second embodiment of the present invention, in which the present invention is applied to a bipolar transistor.

First, as shown in FIG. 2A, an n
A type semiconductor 202 is epitaxially grown and 1
A silicon dioxide film 203 of about 1000 A is formed by thermal oxidation of 00 and ○, and a silicon nitride film 204 of about 100 A is formed by
Grow 0A.

Thereafter, as shown in FIG. 2B, the photoresist 205, 2
06 and 207, and boron ions are implanted. This ion implantation was carried out in 20 plates as in the first embodiment.
The impurity is implanted with V at a concentration of 1 x 1 and 5 - 2 and used for introducing impurities for isolation between elements and for accelerated etching of the silicon nitride film. FIG. 2C shows a P+ diffusion layer 208 formed by ion implantation. Note that the silicon dioxide film 209 and silicon nitride film 210 on the P+ diffusion layer 208 are easily etched by ion implantation. Next, as shown in FIG. 2D, a silicon dioxide film 209 is formed on the inactive region.
Then, the silicon nitride film 210 is removed by etching in a hydrofluoric acid aqueous solution.

At this time, the above-mentioned silicon dioxide film 209 and silicon nitride film 210
Since the etching rate is about three times faster than that of the boron dioxide film and silicon nitride film underlying the photoresists 205, 206, and 207, the lateral etching is almost negligible.

Thereafter, after removing the photoresists 205, 206, and 207, oxidation is performed for about 5 hours to push the P diffusion layer 208 until it reaches the substrate 201, and at the same time, an oxide film 211 of about 1 micron is formed on it. and complete insulation isolation between elements. As shown in FIG. 2E, a transistor element is formed in the isolation region 202' in the epitaxial layer thus formed based on a normal bipolar transistor manufacturing method. That is, after removing the silicon dioxide film 203 and the boron nitride film 204, the P-type base region 212
An n+ region 213 for collector contact, an n+ type emitter region 214 are formed, and finally a wiring 2 connected to these regions.
15, 216, and 217 to complete the process. The effect obtained by the first and second implementations is that the manufacturing process can be simplified, as described above as a general effect.

That is, compared to conventional methods, steps such as nitride film oxidation or oxide film vapor phase growth are not necessary, and the processing speed is improved. In addition, in terms of device characteristics, I
J-ke current is reduced and reliability is increased. Furthermore, in the past, a silicon dioxide film was used as a medium to form a pattern of a silicon nitride film, but with the present invention, a pattern can be formed directly from a photoresist, and moreover, it is possible to form a pattern directly from a photoresist, and it is also possible to form a pattern using a silicon dioxide film and a silicon nitride film. Since the etching rate differs depending on the area to be removed, lateral etching can be ignored, making highly accurate microfabrication possible. Note that in the first embodiment, a P-type Katsura blank plate was used, but n
A type silicon substrate may be used to form a P-channel type field effect transistor, or the second embodiment may be used to form a P-type bipolar transistor, a diode, a resistance element, etc. Further, when etching a boron dioxide film and a carbon nitride film which are etched at an accelerated rate by ion implantation, the same effect can be obtained even if the etching is performed after removing the photoresist.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1A to 1E are cross-sectional views of the main steps of a method for manufacturing a silicon gate type MOS integrated circuit according to a first embodiment of the present invention, and FIGS. FIG. 3 is a cross-sectional view of the main steps of a method for manufacturing a bipolar integrated circuit according to a second embodiment of the invention; In the figure, 101, 201 are silicon substrates, 102, 107, 1
08,109,203,21 1 is silicon dioxide film, 10
3,204 silicon nitride film, 104,205,206,2
07 is photoresist, 113, 114, 115, 21
5, 216, 217 are aluminum films, 111, 112
, 105, 208, 212, 213, and 214 are impurity diffusion layers. Hair 1 diagram Millet 2 diagrams

Claims (1)

[Claims] 1 - In a method for manufacturing a semiconductor integrated circuit device, which includes the step of providing an active region and an inactive region on the main surface of a conductive semiconductor by a selective oxidation method using a silicon nitride film, through the silicon nitride film on the inactive region. The method is characterized by comprising the steps of implanting ions into the inactive region, etching away the silicon nitride film on the inactive region, and forming a silicon dioxide film in the inactive region into which the ions have been implanted. A method for manufacturing a semiconductor integrated circuit device.