JPS5842940U - 混成集積回路装置 - Google Patents

混成集積回路装置

Info

Publication number
JPS5842940U
JPS5842940U JP1981138160U JP13816081U JPS5842940U JP S5842940 U JPS5842940 U JP S5842940U JP 1981138160 U JP1981138160 U JP 1981138160U JP 13816081 U JP13816081 U JP 13816081U JP S5842940 U JPS5842940 U JP S5842940U
Authority
JP
Japan
Prior art keywords
circuit board
circuit device
integrated circuit
hybrid integrated
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1981138160U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0246054Y2 (enExample
Inventor
枝 茂男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP1981138160U priority Critical patent/JPS5842940U/ja
Publication of JPS5842940U publication Critical patent/JPS5842940U/ja
Application granted granted Critical
Publication of JPH0246054Y2 publication Critical patent/JPH0246054Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W72/30
    • H10W70/656
    • H10W72/07353
    • H10W72/334
    • H10W72/50
    • H10W72/5445
    • H10W72/884
    • H10W72/931
    • H10W72/932
    • H10W90/734
    • H10W90/754

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)
JP1981138160U 1981-09-16 1981-09-16 混成集積回路装置 Granted JPS5842940U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1981138160U JPS5842940U (ja) 1981-09-16 1981-09-16 混成集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1981138160U JPS5842940U (ja) 1981-09-16 1981-09-16 混成集積回路装置

Publications (2)

Publication Number Publication Date
JPS5842940U true JPS5842940U (ja) 1983-03-23
JPH0246054Y2 JPH0246054Y2 (enExample) 1990-12-05

Family

ID=29931394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1981138160U Granted JPS5842940U (ja) 1981-09-16 1981-09-16 混成集積回路装置

Country Status (1)

Country Link
JP (1) JPS5842940U (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58207655A (ja) * 1982-05-28 1983-12-03 Hitachi Ltd 半導体装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5444773A (en) * 1977-09-16 1979-04-09 Nippon Cetu Kk Method of mounting electronic parts to printed board
JPS5797634A (en) * 1980-12-11 1982-06-17 Canon Inc Hybrid integrated circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5444773A (en) * 1977-09-16 1979-04-09 Nippon Cetu Kk Method of mounting electronic parts to printed board
JPS5797634A (en) * 1980-12-11 1982-06-17 Canon Inc Hybrid integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58207655A (ja) * 1982-05-28 1983-12-03 Hitachi Ltd 半導体装置

Also Published As

Publication number Publication date
JPH0246054Y2 (enExample) 1990-12-05

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