JPS5839027A - Ｍｏｓ型半導体装置の製造方法 - Google Patents
Ｍｏｓ型半導体装置の製造方法Info
- Publication number
- JPS5839027A JPS5839027A JP56137238A JP13723881A JPS5839027A JP S5839027 A JPS5839027 A JP S5839027A JP 56137238 A JP56137238 A JP 56137238A JP 13723881 A JP13723881 A JP 13723881A JP S5839027 A JPS5839027 A JP S5839027A
- Authority
- JP
- Japan
- Prior art keywords
- region
- film
- isolation region
- element isolation
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Element Separation (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56137238A JPS5839027A (ja) | 1981-09-01 | 1981-09-01 | Ｍｏｓ型半導体装置の製造方法 |
| US06/307,877 US4560421A (en) | 1980-10-02 | 1981-10-02 | Semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56137238A JPS5839027A (ja) | 1981-09-01 | 1981-09-01 | Ｍｏｓ型半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5839027A true JPS5839027A (ja) | 1983-03-07 |
| JPS6220697B2 JPS6220697B2 (enrdf_load_stackoverflow) | 1987-05-08 |
Family
ID=15193996
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56137238A Granted JPS5839027A (ja) | 1980-10-02 | 1981-09-01 | Ｍｏｓ型半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5839027A (enrdf_load_stackoverflow) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5061189A (enrdf_load_stackoverflow) * | 1973-09-28 | 1975-05-26 |
-
1981
- 1981-09-01 JP JP56137238A patent/JPS5839027A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5061189A (enrdf_load_stackoverflow) * | 1973-09-28 | 1975-05-26 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6220697B2 (enrdf_load_stackoverflow) | 1987-05-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4418470A (en) | Method for fabricating silicon-on-sapphire monolithic microwave integrated circuits | |
| US4149307A (en) | Process for fabricating insulated-gate field-effect transistors with self-aligned contacts | |
| JPH0834311B2 (ja) | 半導体装置の製造方法 | |
| US3994758A (en) | Method of manufacturing a semiconductor device having closely spaced electrodes by perpendicular projection | |
| JPH0468786B2 (enrdf_load_stackoverflow) | ||
| JPH01268072A (ja) | 接合形電界効果トランジスタを製造する方法 | |
| JPS582076A (ja) | シヨツトキダイオ−ドの製造方法 | |
| US4775644A (en) | Zero bird-beak oxide isolation scheme for integrated circuits | |
| US4170500A (en) | Process for forming field dielectric regions in semiconductor structures without encroaching on device regions | |
| JPH0231464A (ja) | 半導体装置 | |
| US4498223A (en) | Method of fabrication of monolithic integrated circuit structure | |
| JPS5839027A (ja) | Ｍｏｓ型半導体装置の製造方法 | |
| JPH0210730A (ja) | 集積回路チップ上の電界効果トランジスタ用のフィールド・アイソレーション形成方法と構造 | |
| JP2904545B2 (ja) | 高耐圧プレーナ型半導体素子およびその製造方法 | |
| KR100272577B1 (ko) | 바이폴라 트랜지스터의 제조방법 | |
| JPH05343413A (ja) | バイポーラトランジスタとその製造方法 | |
| JPS61285763A (ja) | シヨツトキ−バリヤ型半導体装置およびその製造方法 | |
| KR0156125B1 (ko) | 반도체 소자 제조방법 | |
| JPS59119740A (ja) | 半導体装置 | |
| KR940010540B1 (ko) | 게더링 기능을 갖는 소자분리영역 형성방법 및 그 구조 | |
| JP2745946B2 (ja) | 半導体集積回路の製造方法 | |
| EP0146212A1 (en) | Schottky barrier diode and method of manufacturing it | |
| JPS59197174A (ja) | Ｍｉｓ型半導体装置 | |
| JP2005277108A (ja) | 炭化珪素半導体装置の製造方法 | |
| JPS6386476A (ja) | 半導体集積回路装置の製造方法 |