JPS5820536U - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS5820536U JPS5820536U JP11635881U JP11635881U JPS5820536U JP S5820536 U JPS5820536 U JP S5820536U JP 11635881 U JP11635881 U JP 11635881U JP 11635881 U JP11635881 U JP 11635881U JP S5820536 U JPS5820536 U JP S5820536U
- Authority
- JP
- Japan
- Prior art keywords
- bonded
- semiconductor equipment
- alloy
- holding plate
- main surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図は従来の電力用半導体素子の要部断面図、第2図
Aはこの考案の一実施例の要部断面図、第2図Bはこの
実施例に用いる基板保持板の斜視図、第3図はこの実施
例の完成品の断面図である。 図において、1はSiウェハー(半導体基板)、3はろ
う材、5は基板保持板、6は貫通孔である。 なお、図中同一符号は同一または相当部分を示す。
Aはこの考案の一実施例の要部断面図、第2図Bはこの
実施例に用いる基板保持板の斜視図、第3図はこの実施
例の完成品の断面図である。 図において、1はSiウェハー(半導体基板)、3はろ
う材、5は基板保持板、6は貫通孔である。 なお、図中同一符号は同一または相当部分を示す。
Claims (1)
- 半導体基板と、金属からなり上記半導体基板を保持する
基板保持板とをろう材を介して合金固着してなるものに
おいて、上記基板保持板にその一方の主面から他方の主
面に達己上記合金固着時に上記ろう材から発生するガス
を放出させる置溝孔を設けたことを特徴とする半導体装
置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11635881U JPS5820536U (ja) | 1981-08-03 | 1981-08-03 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11635881U JPS5820536U (ja) | 1981-08-03 | 1981-08-03 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5820536U true JPS5820536U (ja) | 1983-02-08 |
Family
ID=29910583
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11635881U Pending JPS5820536U (ja) | 1981-08-03 | 1981-08-03 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5820536U (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6376461A (ja) * | 1986-09-19 | 1988-04-06 | Hitachi Ltd | 半導体装置の製造方法 |
JPH0390855U (ja) * | 1989-12-28 | 1991-09-17 | ||
JP2013179103A (ja) * | 2012-02-28 | 2013-09-09 | Nissan Motor Co Ltd | 半導体装置の製造方法 |
-
1981
- 1981-08-03 JP JP11635881U patent/JPS5820536U/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6376461A (ja) * | 1986-09-19 | 1988-04-06 | Hitachi Ltd | 半導体装置の製造方法 |
JPH0390855U (ja) * | 1989-12-28 | 1991-09-17 | ||
JP2013179103A (ja) * | 2012-02-28 | 2013-09-09 | Nissan Motor Co Ltd | 半導体装置の製造方法 |
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