JPS58189541U - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS58189541U
JPS58189541U JP8727282U JP8727282U JPS58189541U JP S58189541 U JPS58189541 U JP S58189541U JP 8727282 U JP8727282 U JP 8727282U JP 8727282 U JP8727282 U JP 8727282U JP S58189541 U JPS58189541 U JP S58189541U
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit device
hybrid integrated
metal
soldered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8727282U
Other languages
Japanese (ja)
Inventor
博 渡部
Original Assignee
富士電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士電機株式会社 filed Critical 富士電機株式会社
Priority to JP8727282U priority Critical patent/JPS58189541U/en
Publication of JPS58189541U publication Critical patent/JPS58189541U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す混成集積回路装置の断
面図、第2図は本考案の他の実施例を示す混成集積回路
装置の断面図である。 1:箱体、3:ニッケルメッキ、4:絶縁板、5゜7.
12:半田層、6:半導体素子、8:回路基板、11:
金属板。
FIG. 1 is a sectional view of a hybrid integrated circuit device showing one embodiment of the present invention, and FIG. 2 is a sectional view of a hybrid integrated circuit device showing another embodiment of the invention. 1: Box body, 3: Nickel plating, 4: Insulating plate, 5°7.
12: solder layer, 6: semiconductor element, 8: circuit board, 11:
metal plate.

Claims (4)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)半導体素子および回路基板を半田付は不可能な金
属製箱体内に収容し樹脂封止してなる混成集積回路装置
において、少なくとも素子の搭載される部分が半田付は
可能な金属でメッキされた前記箱体に、その形状が前記
素子より大きく両面をメタライズ形成してなる熱伝導性
良好な絶縁板を介して、該素子を半田付けあるいは硬ろ
う付により固着したことを特徴とする混成集積回路装置
(1) In a hybrid integrated circuit device in which a semiconductor element and a circuit board are housed in a metal box that cannot be soldered and sealed with resin, at least the part where the element is mounted is plated with a metal that can be soldered. The element is fixed to the box body by soldering or hard brazing via an insulating plate having good thermal conductivity and having a shape larger than that of the element and metallized on both sides. Integrated circuit device.
(2)実用新案登録請求の範囲第1項記載のものにおい
て、絶縁板と素子との間には、その形状が素子より大き
くかつ絶縁板より小さな金属板が、はんだ付けあるいは
硬ろう付けにより介在していることを特徴とする混成集
積回路装置。
(2) Utility model registration In the item described in claim 1, a metal plate whose shape is larger than the element and smaller than the insulating plate is interposed between the insulating plate and the element by soldering or hard brazing. A hybrid integrated circuit device characterized by:
(3)実用新案登録請求の範囲第1記載のものにおいて
、絶縁板が極薄のセラミック板であることを特徴とする
混成集積回路装置。
(3) Utility Model Registration The hybrid integrated circuit device according to Claim 1, characterized in that the insulating plate is an extremely thin ceramic plate.
(4)゛実用新案登録請求の範囲第1項記載のものにお
いて半田付は不可能な金属がアルミニウムで ′あり、
半田付は可能な金属がニッケルであることを特徴とする
混成集積回路装置。
(4) ``The metal that cannot be soldered in the item described in paragraph 1 of the claims for utility model registration is aluminum;
A hybrid integrated circuit device characterized in that the metal that can be soldered is nickel.
JP8727282U 1982-06-11 1982-06-11 Hybrid integrated circuit device Pending JPS58189541U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8727282U JPS58189541U (en) 1982-06-11 1982-06-11 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8727282U JPS58189541U (en) 1982-06-11 1982-06-11 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS58189541U true JPS58189541U (en) 1983-12-16

Family

ID=30095998

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8727282U Pending JPS58189541U (en) 1982-06-11 1982-06-11 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS58189541U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524751B2 (en) * 1972-07-12 1977-02-07
JPS5568661A (en) * 1978-11-17 1980-05-23 Hitachi Ltd Structure for mounting power transistor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524751B2 (en) * 1972-07-12 1977-02-07
JPS5568661A (en) * 1978-11-17 1980-05-23 Hitachi Ltd Structure for mounting power transistor

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