JPS6092828U - Electronic component mounting structure - Google Patents
Electronic component mounting structureInfo
- Publication number
- JPS6092828U JPS6092828U JP18645183U JP18645183U JPS6092828U JP S6092828 U JPS6092828 U JP S6092828U JP 18645183 U JP18645183 U JP 18645183U JP 18645183 U JP18645183 U JP 18645183U JP S6092828 U JPS6092828 U JP S6092828U
- Authority
- JP
- Japan
- Prior art keywords
- mounting structure
- double
- glass epoxy
- circuit board
- clad glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図及び第2図はこの考案の一実施例を示す図で、第
1図は斜視図、第2図は断面図である。FIGS. 1 and 2 are views showing an embodiment of this invention, with FIG. 1 being a perspective view and FIG. 2 being a sectional view.
Claims (1)
導体素子を実装する電子部品の実装構造において、両面
銅張ガラスエポキシ回路基板1の1部に該基板とほぼ等
厚の金属板3を埋め込み、該金属板3上に半導体素子4
をグイボンドし、両面銅張ガラスエポキン回路基板1上
に形成された銅箔からなる回路部5にワイヤボンドをし
、回路部5と該両面銅張ガラスエポキシ回路基板1の表
面の電極部8をスルホール9で接続して成る電子部品の
実装構造。In a mounting structure for electronic components such as power transistors and integrated circuits, in which semiconductor elements for high power use are mounted, a metal plate 3 having approximately the same thickness as that of the board is embedded in a part of a double-sided copper-clad glass epoxy circuit board 1, A semiconductor element 4 is placed on the metal plate 3.
wire bond to the circuit part 5 made of copper foil formed on the double-sided copper-clad glass epoxy circuit board 1, and connect the circuit part 5 and the electrode part 8 on the surface of the double-sided copper-clad glass epoxy circuit board 1 through holes. Mounting structure of electronic components connected by 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18645183U JPS6092828U (en) | 1983-11-30 | 1983-11-30 | Electronic component mounting structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18645183U JPS6092828U (en) | 1983-11-30 | 1983-11-30 | Electronic component mounting structure |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6092828U true JPS6092828U (en) | 1985-06-25 |
Family
ID=30402723
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18645183U Pending JPS6092828U (en) | 1983-11-30 | 1983-11-30 | Electronic component mounting structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6092828U (en) |
-
1983
- 1983-11-30 JP JP18645183U patent/JPS6092828U/en active Pending
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