JPS58171796A - 並列二重化記憶装置 - Google Patents

並列二重化記憶装置

Info

Publication number
JPS58171796A
JPS58171796A JP57054857A JP5485782A JPS58171796A JP S58171796 A JPS58171796 A JP S58171796A JP 57054857 A JP57054857 A JP 57054857A JP 5485782 A JP5485782 A JP 5485782A JP S58171796 A JPS58171796 A JP S58171796A
Authority
JP
Japan
Prior art keywords
storage device
time width
circuit
parallel
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57054857A
Other languages
English (en)
Japanese (ja)
Other versions
JPH041375B2 (enExample
Inventor
Hidetsune Kurokawa
黒川 英常
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57054857A priority Critical patent/JPS58171796A/ja
Publication of JPS58171796A publication Critical patent/JPS58171796A/ja
Publication of JPH041375B2 publication Critical patent/JPH041375B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/74Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
JP57054857A 1982-04-02 1982-04-02 並列二重化記憶装置 Granted JPS58171796A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57054857A JPS58171796A (ja) 1982-04-02 1982-04-02 並列二重化記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57054857A JPS58171796A (ja) 1982-04-02 1982-04-02 並列二重化記憶装置

Publications (2)

Publication Number Publication Date
JPS58171796A true JPS58171796A (ja) 1983-10-08
JPH041375B2 JPH041375B2 (enExample) 1992-01-10

Family

ID=12982256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57054857A Granted JPS58171796A (ja) 1982-04-02 1982-04-02 並列二重化記憶装置

Country Status (1)

Country Link
JP (1) JPS58171796A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH076099A (ja) * 1992-12-17 1995-01-10 Internatl Business Mach Corp <Ibm> リモート・データの2重化のためのシステム及び方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH076099A (ja) * 1992-12-17 1995-01-10 Internatl Business Mach Corp <Ibm> リモート・データの2重化のためのシステム及び方法

Also Published As

Publication number Publication date
JPH041375B2 (enExample) 1992-01-10

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