JPS58164257A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS58164257A
JPS58164257A JP57048478A JP4847882A JPS58164257A JP S58164257 A JPS58164257 A JP S58164257A JP 57048478 A JP57048478 A JP 57048478A JP 4847882 A JP4847882 A JP 4847882A JP S58164257 A JPS58164257 A JP S58164257A
Authority
JP
Japan
Prior art keywords
resistors
polycrystalline silicon
resistor
resistance
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57048478A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0225259B2 (enrdf_load_stackoverflow
Inventor
Kazuo Ogasawara
和夫 小笠原
Giichi Kato
義一 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57048478A priority Critical patent/JPS58164257A/ja
Publication of JPS58164257A publication Critical patent/JPS58164257A/ja
Publication of JPH0225259B2 publication Critical patent/JPH0225259B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/209—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only resistors

Landscapes

  • Semiconductor Integrated Circuits (AREA)
JP57048478A 1982-03-25 1982-03-25 半導体装置 Granted JPS58164257A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57048478A JPS58164257A (ja) 1982-03-25 1982-03-25 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57048478A JPS58164257A (ja) 1982-03-25 1982-03-25 半導体装置

Publications (2)

Publication Number Publication Date
JPS58164257A true JPS58164257A (ja) 1983-09-29
JPH0225259B2 JPH0225259B2 (enrdf_load_stackoverflow) 1990-06-01

Family

ID=12804487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57048478A Granted JPS58164257A (ja) 1982-03-25 1982-03-25 半導体装置

Country Status (1)

Country Link
JP (1) JPS58164257A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6060760A (en) * 1997-08-13 2000-05-09 Tritech Microelectronics, Ltd. Optimal resistor network layout

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51150286A (en) * 1975-06-18 1976-12-23 Matsushita Electric Ind Co Ltd Production method of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51150286A (en) * 1975-06-18 1976-12-23 Matsushita Electric Ind Co Ltd Production method of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6060760A (en) * 1997-08-13 2000-05-09 Tritech Microelectronics, Ltd. Optimal resistor network layout

Also Published As

Publication number Publication date
JPH0225259B2 (enrdf_load_stackoverflow) 1990-06-01

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